1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
#[doc = "Register `R8_UART2_IER` reader"]
pub struct R(crate::R<R8_UART2_IER_SPEC>);
impl core::ops::Deref for R {
    type Target = crate::R<R8_UART2_IER_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl From<crate::R<R8_UART2_IER_SPEC>> for R {
    #[inline(always)]
    fn from(reader: crate::R<R8_UART2_IER_SPEC>) -> Self {
        R(reader)
    }
}
#[doc = "Register `R8_UART2_IER` writer"]
pub struct W(crate::W<R8_UART2_IER_SPEC>);
impl core::ops::Deref for W {
    type Target = crate::W<R8_UART2_IER_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl core::ops::DerefMut for W {
    #[inline(always)]
    fn deref_mut(&mut self) -> &mut Self::Target {
        &mut self.0
    }
}
impl From<crate::W<R8_UART2_IER_SPEC>> for W {
    #[inline(always)]
    fn from(writer: crate::W<R8_UART2_IER_SPEC>) -> Self {
        W(writer)
    }
}
#[doc = "Field `RB_IER_RECV_RDY` reader - UART interrupt enable for receiver data ready"]
pub type RB_IER_RECV_RDY_R = crate::BitReader<bool>;
#[doc = "Field `RB_IER_RECV_RDY` writer - UART interrupt enable for receiver data ready"]
pub type RB_IER_RECV_RDY_W<'a, const O: u8> = crate::BitWriter<'a, u8, R8_UART2_IER_SPEC, bool, O>;
#[doc = "Field `RB_IER_THR_EMPTY` reader - UART interrupt enable for THR empty"]
pub type RB_IER_THR_EMPTY_R = crate::BitReader<bool>;
#[doc = "Field `RB_IER_THR_EMPTY` writer - UART interrupt enable for THR empty"]
pub type RB_IER_THR_EMPTY_W<'a, const O: u8> = crate::BitWriter<'a, u8, R8_UART2_IER_SPEC, bool, O>;
#[doc = "Field `RB_IER_LINE_STAT` reader - UART interrupt enable for receiver line status"]
pub type RB_IER_LINE_STAT_R = crate::BitReader<bool>;
#[doc = "Field `RB_IER_LINE_STAT` writer - UART interrupt enable for receiver line status"]
pub type RB_IER_LINE_STAT_W<'a, const O: u8> = crate::BitWriter<'a, u8, R8_UART2_IER_SPEC, bool, O>;
#[doc = "Field `RB_IER_TXD_EN` reader - UART TXD pin enable"]
pub type RB_IER_TXD_EN_R = crate::BitReader<bool>;
#[doc = "Field `RB_IER_TXD_EN` writer - UART TXD pin enable"]
pub type RB_IER_TXD_EN_W<'a, const O: u8> = crate::BitWriter<'a, u8, R8_UART2_IER_SPEC, bool, O>;
#[doc = "Field `RB_IER_RESET` reader - UART software reset control, high action, auto clear"]
pub type RB_IER_RESET_R = crate::BitReader<bool>;
#[doc = "Field `RB_IER_RESET` writer - UART software reset control, high action, auto clear"]
pub type RB_IER_RESET_W<'a, const O: u8> = crate::BitWriter<'a, u8, R8_UART2_IER_SPEC, bool, O>;
impl R {
    #[doc = "Bit 0 - UART interrupt enable for receiver data ready"]
    #[inline(always)]
    pub fn rb_ier_recv_rdy(&self) -> RB_IER_RECV_RDY_R {
        RB_IER_RECV_RDY_R::new((self.bits & 1) != 0)
    }
    #[doc = "Bit 1 - UART interrupt enable for THR empty"]
    #[inline(always)]
    pub fn rb_ier_thr_empty(&self) -> RB_IER_THR_EMPTY_R {
        RB_IER_THR_EMPTY_R::new(((self.bits >> 1) & 1) != 0)
    }
    #[doc = "Bit 2 - UART interrupt enable for receiver line status"]
    #[inline(always)]
    pub fn rb_ier_line_stat(&self) -> RB_IER_LINE_STAT_R {
        RB_IER_LINE_STAT_R::new(((self.bits >> 2) & 1) != 0)
    }
    #[doc = "Bit 6 - UART TXD pin enable"]
    #[inline(always)]
    pub fn rb_ier_txd_en(&self) -> RB_IER_TXD_EN_R {
        RB_IER_TXD_EN_R::new(((self.bits >> 6) & 1) != 0)
    }
    #[doc = "Bit 7 - UART software reset control, high action, auto clear"]
    #[inline(always)]
    pub fn rb_ier_reset(&self) -> RB_IER_RESET_R {
        RB_IER_RESET_R::new(((self.bits >> 7) & 1) != 0)
    }
}
impl W {
    #[doc = "Bit 0 - UART interrupt enable for receiver data ready"]
    #[inline(always)]
    pub fn rb_ier_recv_rdy(&mut self) -> RB_IER_RECV_RDY_W<0> {
        RB_IER_RECV_RDY_W::new(self)
    }
    #[doc = "Bit 1 - UART interrupt enable for THR empty"]
    #[inline(always)]
    pub fn rb_ier_thr_empty(&mut self) -> RB_IER_THR_EMPTY_W<1> {
        RB_IER_THR_EMPTY_W::new(self)
    }
    #[doc = "Bit 2 - UART interrupt enable for receiver line status"]
    #[inline(always)]
    pub fn rb_ier_line_stat(&mut self) -> RB_IER_LINE_STAT_W<2> {
        RB_IER_LINE_STAT_W::new(self)
    }
    #[doc = "Bit 6 - UART TXD pin enable"]
    #[inline(always)]
    pub fn rb_ier_txd_en(&mut self) -> RB_IER_TXD_EN_W<6> {
        RB_IER_TXD_EN_W::new(self)
    }
    #[doc = "Bit 7 - UART software reset control, high action, auto clear"]
    #[inline(always)]
    pub fn rb_ier_reset(&mut self) -> RB_IER_RESET_W<7> {
        RB_IER_RESET_W::new(self)
    }
    #[doc = "Writes raw bits to the register."]
    #[inline(always)]
    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
        self.0.bits(bits);
        self
    }
}
#[doc = "UART2 interrupt enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uart2_ier](index.html) module"]
pub struct R8_UART2_IER_SPEC;
impl crate::RegisterSpec for R8_UART2_IER_SPEC {
    type Ux = u8;
}
#[doc = "`read()` method returns [r8_uart2_ier::R](R) reader structure"]
impl crate::Readable for R8_UART2_IER_SPEC {
    type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [r8_uart2_ier::W](W) writer structure"]
impl crate::Writable for R8_UART2_IER_SPEC {
    type Writer = W;
}
#[doc = "`reset()` method sets R8_UART2_IER to value 0"]
impl crate::Resettable for R8_UART2_IER_SPEC {
    #[inline(always)]
    fn reset_value() -> Self::Ux {
        0
    }
}