1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
#[doc = "Register `R8_UEP2_RX_CTRL_R8_UH_RX_CTRL` reader"]
pub struct R(crate::R<R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC>);
impl core::ops::Deref for R {
    type Target = crate::R<R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl From<crate::R<R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC>> for R {
    #[inline(always)]
    fn from(reader: crate::R<R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC>) -> Self {
        R(reader)
    }
}
#[doc = "Register `R8_UEP2_RX_CTRL_R8_UH_RX_CTRL` writer"]
pub struct W(crate::W<R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC>);
impl core::ops::Deref for W {
    type Target = crate::W<R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC>;
    #[inline(always)]
    fn deref(&self) -> &Self::Target {
        &self.0
    }
}
impl core::ops::DerefMut for W {
    #[inline(always)]
    fn deref_mut(&mut self) -> &mut Self::Target {
        &mut self.0
    }
}
impl From<crate::W<R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC>> for W {
    #[inline(always)]
    fn from(writer: crate::W<R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC>) -> Self {
        W(writer)
    }
}
#[doc = "Field `RB_UEP_RRES_MASK_RB_UH_RRES_MASK` reader - bit mask of handshake response type for USB endpoint X receiving (OUT) and Host reeiver response control bit"]
pub type RB_UEP_RRES_MASK_RB_UH_RRES_MASK_R = crate::FieldReader<u8, u8>;
#[doc = "Field `RB_UEP_RRES_MASK_RB_UH_RRES_MASK` writer - bit mask of handshake response type for USB endpoint X receiving (OUT) and Host reeiver response control bit"]
pub type RB_UEP_RRES_MASK_RB_UH_RRES_MASK_W<'a, const O: u8> =
    crate::FieldWriter<'a, u8, R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC, u8, u8, 2, O>;
#[doc = "Field `RB_UEP_RRES_NO_RB_UH_RRES_NO` reader - Prepared no response and Response control bit of host receiver"]
pub type RB_UEP_RRES_NO_RB_UH_RRES_NO_R = crate::BitReader<bool>;
#[doc = "Field `RB_UEP_RRES_NO_RB_UH_RRES_NO` writer - Prepared no response and Response control bit of host receiver"]
pub type RB_UEP_RRES_NO_RB_UH_RRES_NO_W<'a, const O: u8> =
    crate::BitWriter<'a, u8, R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC, bool, O>;
#[doc = "Field `RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK` reader - expected data toggle flag of USB endpoint X receiving and expected data toggle flag of host receiving (IN)"]
pub type RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK_R = crate::FieldReader<u8, u8>;
#[doc = "Field `RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK` writer - expected data toggle flag of USB endpoint X receiving and expected data toggle flag of host receiving (IN)"]
pub type RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK_W<'a, const O: u8> =
    crate::FieldWriter<'a, u8, R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC, u8, u8, 2, O>;
#[doc = "Field `RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG` reader - enable automatic toggle after successful transfer completion on endpoint and enable automatic toggle after successful receiver completion"]
pub type RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG_R = crate::BitReader<bool>;
#[doc = "Field `RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG` writer - enable automatic toggle after successful transfer completion on endpoint and enable automatic toggle after successful receiver completion"]
pub type RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG_W<'a, const O: u8> =
    crate::BitWriter<'a, u8, R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC, bool, O>;
#[doc = "Field `RB_UH_RDATA_NO` reader - expect no data packet, for high speed hub in host mode"]
pub type RB_UH_RDATA_NO_R = crate::BitReader<bool>;
#[doc = "Field `RB_UH_RDATA_NO` writer - expect no data packet, for high speed hub in host mode"]
pub type RB_UH_RDATA_NO_W<'a, const O: u8> =
    crate::BitWriter<'a, u8, R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC, bool, O>;
impl R {
    #[doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT) and Host reeiver response control bit"]
    #[inline(always)]
    pub fn rb_uep_rres_mask_rb_uh_rres_mask(&self) -> RB_UEP_RRES_MASK_RB_UH_RRES_MASK_R {
        RB_UEP_RRES_MASK_RB_UH_RRES_MASK_R::new((self.bits & 3) as u8)
    }
    #[doc = "Bit 2 - Prepared no response and Response control bit of host receiver"]
    #[inline(always)]
    pub fn rb_uep_rres_no_rb_uh_rres_no(&self) -> RB_UEP_RRES_NO_RB_UH_RRES_NO_R {
        RB_UEP_RRES_NO_RB_UH_RRES_NO_R::new(((self.bits >> 2) & 1) != 0)
    }
    #[doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving and expected data toggle flag of host receiving (IN)"]
    #[inline(always)]
    pub fn rb_uep_r_tog_mask_rb_uh_r_tog_mask(&self) -> RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK_R {
        RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK_R::new(((self.bits >> 3) & 3) as u8)
    }
    #[doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint and enable automatic toggle after successful receiver completion"]
    #[inline(always)]
    pub fn rb_uep_r_autotog_rb_uh_r_autotog(&self) -> RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG_R {
        RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG_R::new(((self.bits >> 5) & 1) != 0)
    }
    #[doc = "Bit 6 - expect no data packet, for high speed hub in host mode"]
    #[inline(always)]
    pub fn rb_uh_rdata_no(&self) -> RB_UH_RDATA_NO_R {
        RB_UH_RDATA_NO_R::new(((self.bits >> 6) & 1) != 0)
    }
}
impl W {
    #[doc = "Bits 0:1 - bit mask of handshake response type for USB endpoint X receiving (OUT) and Host reeiver response control bit"]
    #[inline(always)]
    pub fn rb_uep_rres_mask_rb_uh_rres_mask(&mut self) -> RB_UEP_RRES_MASK_RB_UH_RRES_MASK_W<0> {
        RB_UEP_RRES_MASK_RB_UH_RRES_MASK_W::new(self)
    }
    #[doc = "Bit 2 - Prepared no response and Response control bit of host receiver"]
    #[inline(always)]
    pub fn rb_uep_rres_no_rb_uh_rres_no(&mut self) -> RB_UEP_RRES_NO_RB_UH_RRES_NO_W<2> {
        RB_UEP_RRES_NO_RB_UH_RRES_NO_W::new(self)
    }
    #[doc = "Bits 3:4 - expected data toggle flag of USB endpoint X receiving and expected data toggle flag of host receiving (IN)"]
    #[inline(always)]
    pub fn rb_uep_r_tog_mask_rb_uh_r_tog_mask(
        &mut self,
    ) -> RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK_W<3> {
        RB_UEP_R_TOG_MASK_RB_UH_R_TOG_MASK_W::new(self)
    }
    #[doc = "Bit 5 - enable automatic toggle after successful transfer completion on endpoint and enable automatic toggle after successful receiver completion"]
    #[inline(always)]
    pub fn rb_uep_r_autotog_rb_uh_r_autotog(&mut self) -> RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG_W<5> {
        RB_UEP_R_AUTOTOG_RB_UH_R_AUTOTOG_W::new(self)
    }
    #[doc = "Bit 6 - expect no data packet, for high speed hub in host mode"]
    #[inline(always)]
    pub fn rb_uh_rdata_no(&mut self) -> RB_UH_RDATA_NO_W<6> {
        RB_UH_RDATA_NO_W::new(self)
    }
    #[doc = "Writes raw bits to the register."]
    #[inline(always)]
    pub unsafe fn bits(&mut self, bits: u8) -> &mut Self {
        self.0.bits(bits);
        self
    }
}
#[doc = "endpoint 2 rx control and USb host receive endpoint control register\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [r8_uep2_rx_ctrl_r8_uh_rx_ctrl](index.html) module"]
pub struct R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC;
impl crate::RegisterSpec for R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC {
    type Ux = u8;
}
#[doc = "`read()` method returns [r8_uep2_rx_ctrl_r8_uh_rx_ctrl::R](R) reader structure"]
impl crate::Readable for R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC {
    type Reader = R;
}
#[doc = "`write(|w| ..)` method takes [r8_uep2_rx_ctrl_r8_uh_rx_ctrl::W](W) writer structure"]
impl crate::Writable for R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC {
    type Writer = W;
}
#[doc = "`reset()` method sets R8_UEP2_RX_CTRL_R8_UH_RX_CTRL to value 0"]
impl crate::Resettable for R8_UEP2_RX_CTRL_R8_UH_RX_CTRL_SPEC {
    #[inline(always)]
    fn reset_value() -> Self::Ux {
        0
    }
}