Struct ch32v3::ch32v30x::tim2::RegisterBlock
source · #[repr(C)]pub struct RegisterBlock {Show 16 fields
pub ctlr1: CTLR1,
pub ctlr2: CTLR2,
pub smcfgr: SMCFGR,
pub dmaintenr: DMAINTENR,
pub intfr: INTFR,
pub swevgr: SWEVGR,
pub ccer: CCER,
pub cnt: CNT,
pub psc: PSC,
pub atrlr: ATRLR,
pub ch1cvr: CH1CVR,
pub ch2cvr: CH2CVR,
pub ch3cvr: CH3CVR,
pub ch4cvr: CH4CVR,
pub dmacfgr: DMACFGR,
pub dmaadr: DMAADR,
/* private fields */
}
Expand description
Register block
Fields§
§ctlr1: CTLR1
0x00 - control register 1
ctlr2: CTLR2
0x04 - control register 2
smcfgr: SMCFGR
0x08 - slave mode control register
dmaintenr: DMAINTENR
0x0c - DMA/Interrupt enable register
intfr: INTFR
0x10 - status register
swevgr: SWEVGR
0x14 - event generation register
ccer: CCER
0x20 - capture/compare enable register
cnt: CNT
0x24 - counter
psc: PSC
0x28 - prescaler
atrlr: ATRLR
0x2c - auto-reload register
ch1cvr: CH1CVR
0x34 - capture/compare register 1
ch2cvr: CH2CVR
0x38 - capture/compare register 2
ch3cvr: CH3CVR
0x3c - capture/compare register 3
ch4cvr: CH4CVR
0x40 - capture/compare register 4
dmacfgr: DMACFGR
0x48 - DMA control register
dmaadr: DMAADR
0x4c - DMA address for full transfer
Implementations§
source§impl RegisterBlock
impl RegisterBlock
sourcepub const fn chctlr1_input(&self) -> &CHCTLR1_INPUT
pub const fn chctlr1_input(&self) -> &CHCTLR1_INPUT
0x18 - capture/compare mode register 1 (input mode)
sourcepub const fn chctlr1_output(&self) -> &CHCTLR1_OUTPUT
pub const fn chctlr1_output(&self) -> &CHCTLR1_OUTPUT
0x18 - capture/compare mode register 1 (output mode)
sourcepub const fn chctlr2_input(&self) -> &CHCTLR2_INPUT
pub const fn chctlr2_input(&self) -> &CHCTLR2_INPUT
0x1c - capture/compare mode register 2 (input mode)
sourcepub const fn chctlr2_output(&self) -> &CHCTLR2_OUTPUT
pub const fn chctlr2_output(&self) -> &CHCTLR2_OUTPUT
0x1c - capture/compare mode register 2 (output mode)