pub struct W(_);
Expand description
Register CFGR2
writer
Implementations§
source§impl W
impl W
sourcepub fn prediv1src(&mut self) -> PREDIV1SRC_W<'_, 16>
pub fn prediv1src(&mut self) -> PREDIV1SRC_W<'_, 16>
Bit 16 - PREDIV1 entry clock source
sourcepub fn trng_src(&mut self) -> TRNG_SRC_W<'_, 19>
pub fn trng_src(&mut self) -> TRNG_SRC_W<'_, 19>
Bit 19 - TRNG clock source
sourcepub fn eth1g_src(&mut self) -> ETH1G_SRC_W<'_, 20>
pub fn eth1g_src(&mut self) -> ETH1G_SRC_W<'_, 20>
Bits 20:21 - ETH1G clock source
sourcepub fn eth1g_125m_en(&mut self) -> ETH1G_125M_EN_W<'_, 22>
pub fn eth1g_125m_en(&mut self) -> ETH1G_125M_EN_W<'_, 22>
Bit 22 - ETH1G _125M clock enable
sourcepub fn usbhs_prediy(&mut self) -> USBHS_PREDIY_W<'_, 24>
pub fn usbhs_prediy(&mut self) -> USBHS_PREDIY_W<'_, 24>
Bits 24:26 - USB HS PREDIV division factor
sourcepub fn usbhs_pll_src(&mut self) -> USBHS_PLL_SRC_W<'_, 27>
pub fn usbhs_pll_src(&mut self) -> USBHS_PLL_SRC_W<'_, 27>
Bit 27 - USB HS Multiplication Factor clock source
sourcepub fn usbhs_ckpef_sel(&mut self) -> USBHS_CKPEF_SEL_W<'_, 28>
pub fn usbhs_ckpef_sel(&mut self) -> USBHS_CKPEF_SEL_W<'_, 28>
Bits 28:29 - USB HS Peference Clock source
sourcepub fn usbhs_pllalive(&mut self) -> USBHS_PLLALIVE_W<'_, 30>
pub fn usbhs_pllalive(&mut self) -> USBHS_PLLALIVE_W<'_, 30>
Bit 30 - USB HS Multiplication control
sourcepub fn usbhs_clk_src(&mut self) -> USBHS_CLK_SRC_W<'_, 31>
pub fn usbhs_clk_src(&mut self) -> USBHS_CLK_SRC_W<'_, 31>
Bit 31 - USB HS clock source