Struct ch32v3::ch32v30x::can1::RegisterBlock

source ·

#[repr(C)]
pub struct RegisterBlock {Show 89 fields
    pub ctlr: CTLR,
    pub statr: STATR,
    pub tstatr: TSTATR,
    pub rfifo0: RFIFO0,
    pub rfifo1: RFIFO1,
    pub intenr: INTENR,
    pub errsr: ERRSR,
    pub btimr: BTIMR,
    pub txmir0: TXMIR0,
    pub txmdtr0: TXMDTR0,
    pub txmdlr0: TXMDLR0,
    pub txmdhr0: TXMDHR0,
    pub txmir1: TXMIR1,
    pub txmdtr1: TXMDTR1,
    pub txmdlr1: TXMDLR1,
    pub txmdhr1: TXMDHR1,
    pub txmir2: TXMIR2,
    pub txmdtr2: TXMDTR2,
    pub txmdlr2: TXMDLR2,
    pub txmdhr2: TXMDHR2,
    pub rxmir0: RXMIR0,
    pub rxmdtr0: RXMDTR0,
    pub rxmdlr0: RXMDLR0,
    pub rxmdhr0: RXMDHR0,
    pub rxmir1: RXMIR1,
    pub rxmdtr1: RXMDTR1,
    pub rxmdlr1: RXMDLR1,
    pub rxmdhr1: RXMDHR1,
    pub fctlr: FCTLR,
    pub fmcfgr: FMCFGR,
    pub fscfgr: FSCFGR,
    pub fafifor: FAFIFOR,
    pub fwr: FWR,
    pub f0r1: F0R1,
    pub f0r2: F0R2,
    pub f1r1: F1R1,
    pub f1r2: F1R2,
    pub f2r1: F2R1,
    pub f2r2: F2R2,
    pub f3r1: F3R1,
    pub f3r2: F3R2,
    pub f4r1: F4R1,
    pub f4r2: F4R2,
    pub f5r1: F5R1,
    pub f5r2: F5R2,
    pub f6r1: F6R1,
    pub f6r2: F6R2,
    pub f7r1: F7R1,
    pub f7r2: F7R2,
    pub f8r1: F8R1,
    pub f8r2: F8R2,
    pub f9r1: F9R1,
    pub f9r2: F9R2,
    pub f10r1: F10R1,
    pub f10r2: F10R2,
    pub f11r1: F11R1,
    pub f11r2: F11R2,
    pub f12r1: F12R1,
    pub f12r2: F12R2,
    pub f13r1: F13R1,
    pub f13r2: F13R2,
    pub f14r1: F14R1,
    pub f14r2: F14R2,
    pub f15r1: F15R1,
    pub f15r2: F15R2,
    pub f16r1: F16R1,
    pub f16r2: F16R2,
    pub f17r1: F17R1,
    pub f17r2: F17R2,
    pub f18r1: F18R1,
    pub f18r2: F18R2,
    pub f19r1: F19R1,
    pub f19r2: F19R2,
    pub f20r1: F20R1,
    pub f20r2: F20R2,
    pub f21r1: F21R1,
    pub f21r2: F21R2,
    pub f22r1: F22R1,
    pub f22r2: F22R2,
    pub f23r1: F23R1,
    pub f23r2: F23R2,
    pub f24r1: F24R1,
    pub f24r2: F24R2,
    pub f25r1: F25R1,
    pub f25r2: F25R2,
    pub f26r1: F26R1,
    pub f26r2: F26R2,
    pub f27r1: F27R1,
    pub f27r2: F27R2,
    /* private fields */
}

Expand description

Register block

Fields§

§ctlr: CTLR

0x00 - CAN Master control register

§statr: STATR

0x04 - CAN master status register

§tstatr: TSTATR

0x08 - CAN transmit status register

§rfifo0: RFIFO0

0x0c - CAN receive FIFO 0 register

§rfifo1: RFIFO1

0x10 - CAN receive FIFO 1 register

§intenr: INTENR

0x14 - CAN interrupt enable register

§errsr: ERRSR

0x18 - CAN error status register

§btimr: BTIMR

0x1c - CAN bit timing register

§txmir0: TXMIR0

0x180 - CAN TX mailbox identifier register

§txmdtr0: TXMDTR0

0x184 - CAN mailbox data length control and time stamp register

§txmdlr0: TXMDLR0

0x188 - CAN mailbox data low register

§txmdhr0: TXMDHR0

0x18c - CAN mailbox data high register

§txmir1: TXMIR1

0x190 - CAN TX mailbox identifier register

§txmdtr1: TXMDTR1

0x194 - CAN mailbox data length control and time stamp register

§txmdlr1: TXMDLR1

0x198 - CAN mailbox data low register

§txmdhr1: TXMDHR1

0x19c - CAN mailbox data high register

§txmir2: TXMIR2

0x1a0 - CAN TX mailbox identifier register

§txmdtr2: TXMDTR2

0x1a4 - CAN mailbox data length control and time stamp register

§txmdlr2: TXMDLR2

0x1a8 - CAN mailbox data low register

§txmdhr2: TXMDHR2

0x1ac - CAN mailbox data high register

§rxmir0: RXMIR0

0x1b0 - CAN receive FIFO mailbox identifier register

§rxmdtr0: RXMDTR0

0x1b4 - CAN receive FIFO mailbox data length control and time stamp register

§rxmdlr0: RXMDLR0

0x1b8 - CAN receive FIFO mailbox data low register

§rxmdhr0: RXMDHR0

0x1bc - CAN receive FIFO mailbox data high register

§rxmir1: RXMIR1

0x1c0 - CAN receive FIFO mailbox identifier register

§rxmdtr1: RXMDTR1

0x1c4 - CAN receive FIFO mailbox data length control and time stamp register

§rxmdlr1: RXMDLR1

0x1c8 - CAN receive FIFO mailbox data low register

§rxmdhr1: RXMDHR1

0x1cc - CAN receive FIFO mailbox data high register

§fctlr: FCTLR

0x200 - CAN filter master register

§fmcfgr: FMCFGR

0x204 - CAN filter mode register

§fscfgr: FSCFGR

0x20c - CAN filter scale register

§fafifor: FAFIFOR

0x214 - CAN filter FIFO assignment register

§fwr: FWR

0x21c - CAN filter activation register

§f0r1: F0R1

0x240 - Filter bank 0 register 1

§f0r2: F0R2

0x244 - Filter bank 0 register 2

§f1r1: F1R1

0x248 - Filter bank 1 register 1

§f1r2: F1R2

0x24c - Filter bank 1 register 2

§f2r1: F2R1

0x250 - Filter bank 2 register 1

§f2r2: F2R2

0x254 - Filter bank 2 register 2

§f3r1: F3R1

0x258 - Filter bank 3 register 1

§f3r2: F3R2

0x25c - Filter bank 3 register 2

§f4r1: F4R1

0x260 - Filter bank 4 register 1

§f4r2: F4R2

0x264 - Filter bank 4 register 2

§f5r1: F5R1

0x268 - Filter bank 5 register 1

§f5r2: F5R2

0x26c - Filter bank 5 register 2

§f6r1: F6R1

0x270 - Filter bank 6 register 1

§f6r2: F6R2

0x274 - Filter bank 6 register 2

§f7r1: F7R1

0x278 - Filter bank 7 register 1

§f7r2: F7R2

0x27c - Filter bank 7 register 2

§f8r1: F8R1

0x280 - Filter bank 8 register 1

§f8r2: F8R2

0x284 - Filter bank 8 register 2

§f9r1: F9R1

0x288 - Filter bank 9 register 1

§f9r2: F9R2

0x28c - Filter bank 9 register 2

§f10r1: F10R1

0x290 - Filter bank 10 register 1

§f10r2: F10R2

0x294 - Filter bank 10 register 2

§f11r1: F11R1

0x298 - Filter bank 11 register 1

§f11r2: F11R2

0x29c - Filter bank 11 register 2

§f12r1: F12R1

0x2a0 - Filter bank 4 register 1

§f12r2: F12R2

0x2a4 - Filter bank 12 register 2

§f13r1: F13R1

0x2a8 - Filter bank 13 register 1

§f13r2: F13R2

0x2ac - Filter bank 13 register 2

§f14r1: F14R1

0x2b0 - Filter bank 14 register 1

§f14r2: F14R2

0x2b4 - Filter bank 14 register 2

§f15r1: F15R1

0x2b8 - Filter bank 15 register 1

§f15r2: F15R2

0x2bc - Filter bank 15 register 2

§f16r1: F16R1

0x2c0 - Filter bank 16 register 1

§f16r2: F16R2

0x2c4 - Filter bank 16 register 2

§f17r1: F17R1

0x2c8 - Filter bank 17 register 1

§f17r2: F17R2

0x2cc - Filter bank 17 register 2

§f18r1: F18R1

0x2d0 - Filter bank 18 register 1

§f18r2: F18R2

0x2d4 - Filter bank 18 register 2

§f19r1: F19R1

0x2d8 - Filter bank 19 register 1

§f19r2: F19R2

0x2dc - Filter bank 19 register 2

§f20r1: F20R1

0x2e0 - Filter bank 20 register 1

§f20r2: F20R2

0x2e4 - Filter bank 20 register 2

§f21r1: F21R1

0x2e8 - Filter bank 21 register 1

§f21r2: F21R2

0x2ec - Filter bank 21 register 2

§f22r1: F22R1

0x2f0 - Filter bank 22 register 1

§f22r2: F22R2

0x2f4 - Filter bank 22 register 2

§f23r1: F23R1

0x2f8 - Filter bank 23 register 1

§f23r2: F23R2

0x2fc - Filter bank 23 register 2

§f24r1: F24R1

0x300 - Filter bank 24 register 1

§f24r2: F24R2

0x304 - Filter bank 24 register 2

§f25r1: F25R1

0x308 - Filter bank 25 register 1

§f25r2: F25R2

0x30c - Filter bank 25 register 2

§f26r1: F26R1

0x310 - Filter bank 26 register 1

§f26r2: F26R2

0x314 - Filter bank 26 register 2

§f27r1: F27R1

0x318 - Filter bank 27 register 1

§f27r2: F27R2

0x31c - Filter bank 27 register 2

Auto Trait Implementations§

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impl UnwindSafe for RegisterBlock

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impl<T> Any for Twhere T: 'static + ?Sized,

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fn type_id(&self) -> TypeId

Gets the TypeId of self. Read more

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impl<T> Borrow<T> for Twhere T: ?Sized,

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fn borrow(&self) -> &T

Immutably borrows from an owned value. Read more

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impl<T> BorrowMut<T> for Twhere T: ?Sized,

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fn borrow_mut(&mut self) -> &mut T

Mutably borrows from an owned value. Read more

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impl<T> From<T> for T

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fn from(t: T) -> T

Returns the argument unchanged.

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impl<T, U> Into for Twhere U: From<T>,

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fn into(self) -> U

Calls U::from(self).

That is, this conversion is whatever the implementation of From<T> for U chooses to do.

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impl<T, U> TryFrom for Twhere U: Into<T>,

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type Error = Infallible

The type returned in the event of a conversion error.

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fn try_from(value: U) -> Result<T, <T as TryFrom>::Error>

Performs the conversion.

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impl<T, U> TryInto for Twhere U: TryFrom<T>,

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type Error = >::Error

The type returned in the event of a conversion error.

const: unstable · source§

fn try_into(self) -> Result<U, >::Error>

Performs the conversion.

Struct ch32v3::ch32v30x::can1::RegisterBlock

Fields§

Auto Trait Implementations§

impl !RefUnwindSafe for RegisterBlock

impl Send for RegisterBlock

impl !Sync for RegisterBlock

impl Unpin for RegisterBlock

impl UnwindSafe for RegisterBlock

Blanket Implementations§

impl<T> Any for Twhere T: 'static + ?Sized,

fn type_id(&self) -> TypeId

impl<T> Borrow<T> for Twhere T: ?Sized,

fn borrow(&self) -> &T

impl<T> BorrowMut<T> for Twhere T: ?Sized,

fn borrow_mut(&mut self) -> &mut T

impl<T> From<T> for T

fn from(t: T) -> T

impl<T, U> Into<U> for Twhere U: From<T>,

fn into(self) -> U

impl<T, U> TryFrom<U> for Twhere U: Into<T>,

type Error = Infallible

fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>

impl<T, U> TryInto<U> for Twhere U: TryFrom<T>,

type Error = <U as TryFrom<T>>::Error

fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>