ch32rv_debug/lib.rs
1//! en: debug layer. Run control, breakpoints, GDB server (docs/cli.ja.md §4.4, §4.6).
2//!
3//! Contract:
4//! - Never modify target flash on attach (do not reproduce WCH OpenOCD's behavior).
5//! - Software breakpoints are memory-patched `ebreak` (RAM only for now); flash breakpoints
6//! need the QingKe trigger module and are a follow-up. GDB is told the truth (no `hwbreak+`
7//! pretense like minichlink).
8//! - V4F parts (V307/V317/H41x) have FPU registers missing from our RV32 arch; only integer
9//! registers are exposed for now (docs/architecture.ja.md §1.3).
10//!
11//! ja: debug 層。実行制御・breakpoint・GDB server。契約: attach 時に flash を書き換えない、
12//! SW breakpoint は memory patch(当面 RAM のみ)で実態どおり申告する、当面は整数レジスタのみ。
13
14pub mod arch;
15pub mod server;
16
17pub use arch::{Rv32, Rv32CoreRegs, Rv32RegId};
18pub use server::Ch32Target;