pub type ExecutableStatement<Event, Signal> = TestbenchStatement<Event, Signal, CompiledExpr, ExecutableArgument, TestbenchTarget<Signal, CompiledExpr>>;Aliased Type§
pub enum ExecutableStatement<Event, Signal> {
Show 14 variants
ClockNext {
clock_event: Event,
count: ClockCount<CompiledExpr>,
},
ResetAssert {
reset_signal: Signal,
reset_event: Option<Event>,
clock_event: Event,
duration: ClockCount<CompiledExpr>,
assert_value: u8,
deassert_value: u8,
},
Assert {
expr: CompiledExpr,
site_id: u32,
continue_on_fail: bool,
message: Option<AssertMessage<ExecutableArgument>>,
location: Option<SourceLocation>,
},
Display {
message: Option<AssertMessage<ExecutableArgument>>,
newline: bool,
},
If {
expr: CompiledExpr,
then_block: Vec<TestbenchStatement<Event, Signal, CompiledExpr, ExecutableArgument, TestbenchTarget<Signal, CompiledExpr>>>,
else_block: Vec<TestbenchStatement<Event, Signal, CompiledExpr, ExecutableArgument, TestbenchTarget<Signal, CompiledExpr>>>,
},
For {
loop_var: Option<(Signal, usize, bool)>,
start: LoopBound<CompiledExpr>,
end: LoopBound<CompiledExpr>,
inclusive: bool,
step: usize,
step_op: Option<TestbenchOperator>,
reverse: bool,
body: Vec<TestbenchStatement<Event, Signal, CompiledExpr, ExecutableArgument, TestbenchTarget<Signal, CompiledExpr>>>,
},
Assign {
dst: TestbenchTarget<Signal, CompiledExpr>,
expr: CompiledExpr,
},
RandomSeed {
handle: String,
value: CompiledExpr,
},
RandomGet {
handle: String,
width: u32,
signed: bool,
ret: Option<TestbenchTarget<Signal, CompiledExpr>>,
},
RandomGetRange {
handle: String,
min: CompiledExpr,
max: CompiledExpr,
width: u32,
signed: bool,
ret: Option<TestbenchTarget<Signal, CompiledExpr>>,
},
RandomGetSeed {
handle: String,
ret: Option<TestbenchTarget<Signal, CompiledExpr>>,
},
ComponentMethod {
instance: String,
method: String,
args: Vec<ExecutableArgument>,
ret: Option<TestbenchTarget<Signal, CompiledExpr>>,
ret_width: Option<u32>,
ret_signed: bool,
ret_strict: bool,
},
Break,
Finish,
}Variants§
ClockNext
ResetAssert
Assert
Fields
§
expr: CompiledExpr§
message: Option<AssertMessage<ExecutableArgument>>§
location: Option<SourceLocation>Display
If
Fields
§
expr: CompiledExpr§
then_block: Vec<TestbenchStatement<Event, Signal, CompiledExpr, ExecutableArgument, TestbenchTarget<Signal, CompiledExpr>>>§
else_block: Vec<TestbenchStatement<Event, Signal, CompiledExpr, ExecutableArgument, TestbenchTarget<Signal, CompiledExpr>>>For
Fields
§
start: LoopBound<CompiledExpr>§
end: LoopBound<CompiledExpr>§
step_op: Option<TestbenchOperator>§
body: Vec<TestbenchStatement<Event, Signal, CompiledExpr, ExecutableArgument, TestbenchTarget<Signal, CompiledExpr>>>