cell_core/
lib.rs

1// cell-core/src/lib.rs
2#![cfg_attr(not(feature = "std"), no_std)]
3extern crate alloc;
4
5#[cfg(feature = "std")]
6extern crate std;
7
8pub mod error;
9pub mod vesicle;
10
11pub use error::CellError;
12pub use vesicle::{Vesicle, VesicleHeader};
13
14pub mod channel {
15    pub const APP: u8 = 0;
16    pub const ROUTING: u8 = 1;
17    pub const OPS: u8 = 2;
18    pub const MACRO_COORDINATION: u8 = 3;
19}
20
21#[repr(C)]
22#[derive(Debug, Clone, Copy)]
23pub struct RouterDescriptor {
24    pub pipe_name: [u8; 32],
25    pub transport_type: u8,
26    pub _pad: [u8; 31],
27}
28
29impl RouterDescriptor {
30    pub fn from_bytes(bytes: &[u8]) -> Option<Self> {
31        if bytes.len() != 64 {
32            return None;
33        }
34        unsafe {
35            let mut s = core::mem::zeroed();
36            core::ptr::copy_nonoverlapping(bytes.as_ptr(), &mut s as *mut _ as *mut u8, 64);
37            Some(s)
38        }
39    }
40}
cell_core/lib.rs

cell_core/
lib.rs
