[−][src]Struct cc3220sf::hib1p2::RegisterBlock

#[repr(C)]pub struct RegisterBlock {
    pub sram_ska_ldo_parameters0: SRAM_SKA_LDO_PARAMETERS0,
    pub sram_ska_ldo_parameters1: SRAM_SKA_LDO_PARAMETERS1,
    pub dig_dcdc_parameters0: DIG_DCDC_PARAMETERS0,
    pub dig_dcdc_parameters1: DIG_DCDC_PARAMETERS1,
    pub dig_dcdc_parameters2: DIG_DCDC_PARAMETERS2,
    pub dig_dcdc_parameters3: DIG_DCDC_PARAMETERS3,
    pub dig_dcdc_parameters4: DIG_DCDC_PARAMETERS4,
    pub dig_dcdc_parameters5: DIG_DCDC_PARAMETERS5,
    pub dig_dcdc_parameters6: DIG_DCDC_PARAMETERS6,
    pub ana_dcdc_parameters0: ANA_DCDC_PARAMETERS0,
    pub ana_dcdc_parameters1: ANA_DCDC_PARAMETERS1,
    pub ana_dcdc_parameters16: ANA_DCDC_PARAMETERS16,
    pub ana_dcdc_parameters17: ANA_DCDC_PARAMETERS17,
    pub ana_dcdc_parameters18: ANA_DCDC_PARAMETERS18,
    pub ana_dcdc_parameters19: ANA_DCDC_PARAMETERS19,
    pub flash_dcdc_parameters0: FLASH_DCDC_PARAMETERS0,
    pub flash_dcdc_parameters1: FLASH_DCDC_PARAMETERS1,
    pub flash_dcdc_parameters2: FLASH_DCDC_PARAMETERS2,
    pub flash_dcdc_parameters3: FLASH_DCDC_PARAMETERS3,
    pub flash_dcdc_parameters4: FLASH_DCDC_PARAMETERS4,
    pub flash_dcdc_parameters5: FLASH_DCDC_PARAMETERS5,
    pub flash_dcdc_parameters6: FLASH_DCDC_PARAMETERS6,
    pub pmbist_parameters0: PMBIST_PARAMETERS0,
    pub pmbist_parameters1: PMBIST_PARAMETERS1,
    pub pmbist_parameters2: PMBIST_PARAMETERS2,
    pub pmbist_parameters3: PMBIST_PARAMETERS3,
    pub flash_dcdc_parameters8: FLASH_DCDC_PARAMETERS8,
    pub ana_dcdc_parameters_override: ANA_DCDC_PARAMETERS_OVERRIDE,
    pub flash_dcdc_parameters_override: FLASH_DCDC_PARAMETERS_OVERRIDE,
    pub dig_dcdc_vtrim_cfg: DIG_DCDC_VTRIM_CFG,
    pub dig_dcdc_fsm_parameters: DIG_DCDC_FSM_PARAMETERS,
    pub ana_dcdc_fsm_parameters: ANA_DCDC_FSM_PARAMETERS,
    pub sram_ska_ldo_fsm_parameters: SRAM_SKA_LDO_FSM_PARAMETERS,
    pub bgap_duty_cycling_exit_cfg: BGAP_DUTY_CYCLING_EXIT_CFG,
    pub cm_osc_16m_config: CM_OSC_16M_CONFIG,
    pub sop_sense_value: SOP_SENSE_VALUE,
    pub hib_rtc_timer_lsw_1p2: HIB_RTC_TIMER_LSW_1P2,
    pub hib_rtc_timer_msw_1p2: HIB_RTC_TIMER_MSW_1P2,
    pub bgap_trim_overrides: BGAP_TRIM_OVERRIDES,
    pub efuse_read_reg0: EFUSE_READ_REG0,
    pub efuse_read_reg1: EFUSE_READ_REG1,
    pub por_test_ctrl: POR_TEST_CTRL,
    pub hib_timer_sync_calib_cfg0: HIB_TIMER_SYNC_CALIB_CFG0,
    pub hib_timer_sync_calib_cfg1: HIB_TIMER_SYNC_CALIB_CFG1,
    pub hib_timer_sync_cfg2: HIB_TIMER_SYNC_CFG2,
    pub hib_timer_sync_tsf_adj_val: HIB_TIMER_SYNC_TSF_ADJ_VAL,
    pub hib_timer_rtc_gts_timestamp_lsw: HIB_TIMER_RTC_GTS_TIMESTAMP_LSW,
    pub hib_timer_rtc_gts_timestamp_msw: HIB_TIMER_RTC_GTS_TIMESTAMP_MSW,
    pub hib_timer_rtc_wup_timestamp_lsw: HIB_TIMER_RTC_WUP_TIMESTAMP_LSW,
    pub hib_timer_rtc_wup_timestamp_msw: HIB_TIMER_RTC_WUP_TIMESTAMP_MSW,
    pub hib_timer_sync_wake_offset_err: HIB_TIMER_SYNC_WAKE_OFFSET_ERR,
    pub hib_timer_sync_tsf_curr_val_lsw: HIB_TIMER_SYNC_TSF_CURR_VAL_LSW,
    pub hib_timer_sync_tsf_curr_val_msw: HIB_TIMER_SYNC_TSF_CURR_VAL_MSW,
    pub cm_spare: CM_SPARE,
    pub porpol_spare: PORPOL_SPARE,
    pub mem_dig_dcdc_clk_config: MEM_DIG_DCDC_CLK_CONFIG,
    pub mem_ana_dcdc_clk_config: MEM_ANA_DCDC_CLK_CONFIG,
    pub mem_flash_dcdc_clk_config: MEM_FLASH_DCDC_CLK_CONFIG,
    pub mem_pa_dcdc_clk_config: MEM_PA_DCDC_CLK_CONFIG,
    pub mem_sldo_vnwa_override: MEM_SLDO_VNWA_OVERRIDE,
    pub mem_bgap_duty_cycling_enable_override: MEM_BGAP_DUTY_CYCLING_ENABLE_OVERRIDE,
    pub mem_hib_fsm_debug: MEM_HIB_FSM_DEBUG,
    pub mem_sldo_vnwa_sw_ctrl: MEM_SLDO_VNWA_SW_CTRL,
    pub mem_sldo_weak_process: MEM_SLDO_WEAK_PROCESS,
    pub mem_pa_dcdc_ov_uv_status: MEM_PA_DCDC_OV_UV_STATUS,
    pub mem_cm_test_mode: MEM_CM_TEST_MODE,
    // some fields omitted
}

Register block

Fields

sram_ska_ldo_parameters0: SRAM_SKA_LDO_PARAMETERS0

0x00 - SRAM_SKA_LDO_PARAMETERS0

sram_ska_ldo_parameters1: SRAM_SKA_LDO_PARAMETERS1

0x04 - SRAM_SKA_LDO_PARAMETERS1

dig_dcdc_parameters0: DIG_DCDC_PARAMETERS0

0x08 - DIG_DCDC_PARAMETERS0

dig_dcdc_parameters1: DIG_DCDC_PARAMETERS1

0x0c - DIG_DCDC_PARAMETERS1

dig_dcdc_parameters2: DIG_DCDC_PARAMETERS2

0x10 - DIG_DCDC_PARAMETERS2

dig_dcdc_parameters3: DIG_DCDC_PARAMETERS3

0x14 - DIG_DCDC_PARAMETERS3

dig_dcdc_parameters4: DIG_DCDC_PARAMETERS4

0x18 - DIG_DCDC_PARAMETERS4

dig_dcdc_parameters5: DIG_DCDC_PARAMETERS5

0x1c - DIG_DCDC_PARAMETERS5

dig_dcdc_parameters6: DIG_DCDC_PARAMETERS6

0x20 - DIG_DCDC_PARAMETERS6

ana_dcdc_parameters0: ANA_DCDC_PARAMETERS0

0x24 - ANA_DCDC_PARAMETERS0

ana_dcdc_parameters1: ANA_DCDC_PARAMETERS1

0x28 - ANA_DCDC_PARAMETERS1

ana_dcdc_parameters16: ANA_DCDC_PARAMETERS16

0x64 - ANA_DCDC_PARAMETERS16

ana_dcdc_parameters17: ANA_DCDC_PARAMETERS17

0x68 - ANA_DCDC_PARAMETERS17

ana_dcdc_parameters18: ANA_DCDC_PARAMETERS18

0x6c - ANA_DCDC_PARAMETERS18

ana_dcdc_parameters19: ANA_DCDC_PARAMETERS19

0x70 - ANA_DCDC_PARAMETERS19

flash_dcdc_parameters0: FLASH_DCDC_PARAMETERS0

0x74 - FLASH_DCDC_PARAMETERS0

flash_dcdc_parameters1: FLASH_DCDC_PARAMETERS1

0x78 - FLASH_DCDC_PARAMETERS1

flash_dcdc_parameters2: FLASH_DCDC_PARAMETERS2

0x7c - FLASH_DCDC_PARAMETERS2

flash_dcdc_parameters3: FLASH_DCDC_PARAMETERS3

0x80 - FLASH_DCDC_PARAMETERS3

flash_dcdc_parameters4: FLASH_DCDC_PARAMETERS4

0x84 - FLASH_DCDC_PARAMETERS4

flash_dcdc_parameters5: FLASH_DCDC_PARAMETERS5

0x88 - FLASH_DCDC_PARAMETERS5

flash_dcdc_parameters6: FLASH_DCDC_PARAMETERS6

0x8c - FLASH_DCDC_PARAMETERS6

pmbist_parameters0: PMBIST_PARAMETERS0

0x94 - PMBIST_PARAMETERS0

pmbist_parameters1: PMBIST_PARAMETERS1

0x98 - PMBIST_PARAMETERS1

pmbist_parameters2: PMBIST_PARAMETERS2

0x9c - PMBIST_PARAMETERS2

pmbist_parameters3: PMBIST_PARAMETERS3

0xa0 - PMBIST_PARAMETERS3

flash_dcdc_parameters8: FLASH_DCDC_PARAMETERS8

0xa4 - FLASH_DCDC_PARAMETERS8

ana_dcdc_parameters_override: ANA_DCDC_PARAMETERS_OVERRIDE

0xa8 - ANA_DCDC_PARAMETERS_OVERRIDE

flash_dcdc_parameters_override: FLASH_DCDC_PARAMETERS_OVERRIDE

0xac - FLASH_DCDC_PARAMETERS_OVERRIDE

dig_dcdc_vtrim_cfg: DIG_DCDC_VTRIM_CFG

0xb0 - DIG_DCDC_VTRIM_CFG

dig_dcdc_fsm_parameters: DIG_DCDC_FSM_PARAMETERS

0xb4 - DIG_DCDC_FSM_PARAMETERS

ana_dcdc_fsm_parameters: ANA_DCDC_FSM_PARAMETERS

0xb8 - ANA_DCDC_FSM_PARAMETERS

sram_ska_ldo_fsm_parameters: SRAM_SKA_LDO_FSM_PARAMETERS

0xbc - SRAM_SKA_LDO_FSM_PARAMETERS

bgap_duty_cycling_exit_cfg: BGAP_DUTY_CYCLING_EXIT_CFG

0xc0 - BGAP_DUTY_CYCLING_EXIT_CFG

cm_osc_16m_config: CM_OSC_16M_CONFIG

0xc4 - CM_OSC_16M_CONFIG

sop_sense_value: SOP_SENSE_VALUE

0xc8 - SOP_SENSE_VALUE

hib_rtc_timer_lsw_1p2: HIB_RTC_TIMER_LSW_1P2

0xcc - HIB_RTC_TIMER_LSW_1P2

hib_rtc_timer_msw_1p2: HIB_RTC_TIMER_MSW_1P2

0xd0 - HIB_RTC_TIMER_MSW_1P2

bgap_trim_overrides: BGAP_TRIM_OVERRIDES

0xd4 - BGAP_TRIM_OVERRIDES

efuse_read_reg0: EFUSE_READ_REG0

0xd8 - EFUSE_READ_REG0

efuse_read_reg1: EFUSE_READ_REG1

0xdc - EFUSE_READ_REG1

por_test_ctrl: POR_TEST_CTRL

0xe0 - POR_TEST_CTRL

hib_timer_sync_calib_cfg0: HIB_TIMER_SYNC_CALIB_CFG0

0xe4 - HIB_TIMER_SYNC_CALIB_CFG0

hib_timer_sync_calib_cfg1: HIB_TIMER_SYNC_CALIB_CFG1

0xe8 - HIB_TIMER_SYNC_CALIB_CFG1

hib_timer_sync_cfg2: HIB_TIMER_SYNC_CFG2

0xec - HIB_TIMER_SYNC_CFG2

hib_timer_sync_tsf_adj_val: HIB_TIMER_SYNC_TSF_ADJ_VAL

0xf0 - HIB_TIMER_SYNC_TSF_ADJ_VAL

hib_timer_rtc_gts_timestamp_lsw: HIB_TIMER_RTC_GTS_TIMESTAMP_LSW

0xf4 - HIB_TIMER_RTC_GTS_TIMESTAMP_LSW

hib_timer_rtc_gts_timestamp_msw: HIB_TIMER_RTC_GTS_TIMESTAMP_MSW

0xf8 - HIB_TIMER_RTC_GTS_TIMESTAMP_MSW

hib_timer_rtc_wup_timestamp_lsw: HIB_TIMER_RTC_WUP_TIMESTAMP_LSW

0xfc - HIB_TIMER_RTC_WUP_TIMESTAMP_LSW

hib_timer_rtc_wup_timestamp_msw: HIB_TIMER_RTC_WUP_TIMESTAMP_MSW

0x100 - HIB_TIMER_RTC_WUP_TIMESTAMP_MSW

hib_timer_sync_wake_offset_err: HIB_TIMER_SYNC_WAKE_OFFSET_ERR

0x104 - HIB_TIMER_SYNC_WAKE_OFFSET_ERR

hib_timer_sync_tsf_curr_val_lsw: HIB_TIMER_SYNC_TSF_CURR_VAL_LSW

0x108 - HIB_TIMER_SYNC_TSF_CURR_VAL_LSW

hib_timer_sync_tsf_curr_val_msw: HIB_TIMER_SYNC_TSF_CURR_VAL_MSW

0x10c - HIB_TIMER_SYNC_TSF_CURR_VAL_MSW

cm_spare: CM_SPARE

0x110 - CM_SPARE

porpol_spare: PORPOL_SPARE

0x114 - PORPOL_SPARE

mem_dig_dcdc_clk_config: MEM_DIG_DCDC_CLK_CONFIG

0x118 - MEM_DIG_DCDC_CLK_CONFIG

mem_ana_dcdc_clk_config: MEM_ANA_DCDC_CLK_CONFIG

0x11c - MEM_ANA_DCDC_CLK_CONFIG

mem_flash_dcdc_clk_config: MEM_FLASH_DCDC_CLK_CONFIG

0x120 - MEM_FLASH_DCDC_CLK_CONFIG

mem_pa_dcdc_clk_config: MEM_PA_DCDC_CLK_CONFIG

0x124 - MEM_PA_DCDC_CLK_CONFIG

mem_sldo_vnwa_override: MEM_SLDO_VNWA_OVERRIDE

0x128 - MEM_SLDO_VNWA_OVERRIDE

mem_bgap_duty_cycling_enable_override: MEM_BGAP_DUTY_CYCLING_ENABLE_OVERRIDE

0x12c - MEM_BGAP_DUTY_CYCLING_ENABLE_OVERRIDE

mem_hib_fsm_debug: MEM_HIB_FSM_DEBUG

0x130 - MEM_HIB_FSM_DEBUG

mem_sldo_vnwa_sw_ctrl: MEM_SLDO_VNWA_SW_CTRL

0x134 - MEM_SLDO_VNWA_SW_CTRL

mem_sldo_weak_process: MEM_SLDO_WEAK_PROCESS

0x138 - MEM_SLDO_WEAK_PROCESS

mem_pa_dcdc_ov_uv_status: MEM_PA_DCDC_OV_UV_STATUS

0x13c - MEM_PA_DCDC_OV_UV_STATUS

mem_cm_test_mode: MEM_CM_TEST_MODE

0x140 - MEM_CM_TEST_MODE

Auto Trait Implementations

`impl Send for RegisterBlock`

`impl !Sync for RegisterBlock`

`impl Unpin for RegisterBlock`

Blanket Implementations

`impl<T> Any for T where T: 'static + ?Sized,` [src]

`fn type_id(&self) -> TypeId`[src]

`impl<T> Borrow<T> for T where T: ?Sized,` [src]

`fn borrow(&self) -> &T`[src]

`impl<T> BorrowMut<T> for T where T: ?Sized,` [src]

`fn borrow_mut(&mut self) -> &mut T`[src]

`impl<T> From<T> for T`[src]

`fn from(t: T) -> T`[src]

`impl<T, U> Into for T where U: From<T>,` [src]

`fn into(self) -> U`[src]

`impl<T> Same<T> for T`

`type Output = T`

Should always be Self

`impl<T, U> TryFrom for T where U: Into<T>,` [src]

`type Error = Infallible`

The type returned in the event of a conversion error.

`fn try_from(value: U) -> Result<T, <T as TryFrom>::Error>`[src]

`impl<T, U> TryInto for T where U: TryFrom<T>,` [src]

`type Error = >::Error`

The type returned in the event of a conversion error.

[−][src]Struct cc3220sf::hib1p2::RegisterBlock

Fields

Auto Trait Implementations

`impl Send for RegisterBlock`

`impl !Sync for RegisterBlock`

`impl Unpin for RegisterBlock`

Blanket Implementations

`impl<T> Any for T where T: 'static + ?Sized,` [src]

`fn type_id(&self) -> TypeId`[src]

`impl<T> Borrow<T> for T where T: ?Sized,` [src]

`fn borrow(&self) -> &T`[src]

`impl<T> BorrowMut<T> for T where T: ?Sized,` [src]

`fn borrow_mut(&mut self) -> &mut T`[src]

`impl<T> From<T> for T`[src]

`fn from(t: T) -> T`[src]

`impl<T, U> Into<U> for T where U: From<T>,` [src]

`fn into(self) -> U`[src]

`impl<T> Same<T> for T`

`type Output = T`

`impl<T, U> TryFrom<U> for T where U: Into<T>,` [src]

`type Error = Infallible`

`fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>`[src]

`impl<T, U> TryInto<U> for T where U: TryFrom<T>,` [src]

`type Error = <U as TryFrom<T>>::Error`

`fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>`[src]

[−][src]Struct cc3220sf::hib1p2::RegisterBlock

Fields

Auto Trait Implementations

impl Send for RegisterBlock

impl !Sync for RegisterBlock

impl Unpin for RegisterBlock

Blanket Implementations

impl<T> Any for T where T: 'static + ?Sized, [src]

fn type_id(&self) -> TypeId[src]

impl<T> Borrow<T> for T where T: ?Sized, [src]

fn borrow(&self) -> &T[src]

impl<T> BorrowMut<T> for T where T: ?Sized, [src]

fn borrow_mut(&mut self) -> &mut T[src]

impl<T> From<T> for T[src]

fn from(t: T) -> T[src]

impl<T, U> Into<U> for T where U: From<T>, [src]

fn into(self) -> U[src]

impl<T> Same<T> for T

type Output = T

impl<T, U> TryFrom<U> for T where U: Into<T>, [src]

type Error = Infallible

fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>[src]

impl<T, U> TryInto<U> for T where U: TryFrom<T>, [src]

type Error = <U as TryFrom<T>>::Error

fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>[src]

`impl Send for RegisterBlock`

`impl !Sync for RegisterBlock`

`impl Unpin for RegisterBlock`

`impl<T> Any for T where T: 'static + ?Sized,` [src]

`fn type_id(&self) -> TypeId`[src]

`impl<T> Borrow<T> for T where T: ?Sized,` [src]

`fn borrow(&self) -> &T`[src]

`impl<T> BorrowMut<T> for T where T: ?Sized,` [src]

`fn borrow_mut(&mut self) -> &mut T`[src]

`impl<T> From<T> for T`[src]

`fn from(t: T) -> T`[src]

`impl<T, U> Into<U> for T where U: From<T>,` [src]

`fn into(self) -> U`[src]

`impl<T> Same<T> for T`

`type Output = T`

`impl<T, U> TryFrom<U> for T where U: Into<T>,` [src]

`type Error = Infallible`

`fn try_from(value: U) -> Result<T, <T as TryFrom<U>>::Error>`[src]

`impl<T, U> TryInto<U> for T where U: TryFrom<T>,` [src]

`type Error = <U as TryFrom<T>>::Error`

`fn try_into(self) -> Result<U, <U as TryFrom<T>>::Error>`[src]