[][src]Type Definition cc3220sf::gpioa0::PCELLID1

type PCELLID1 = Reg<u32, _PCELLID1>;

0x4000 5FF4 0x4000 6FF4 0x4000 7FF4 0x4002 4FF4 GPIO PrimeCell Identification 1 (GPIOPCellID1)@@ offset 0xFF4 The GPIOPCellID0@@ GPIOPCellID1@@ GPIOPCellID2@@ and GPIOPCellID3 registers are four 8-bit wide registers@@ that can conceptually be treated as one 32-bit register. The register is used as a standard cross-peripheral identification system.

This register you can read, reset, write, write_with_zero, modify. See API.

For information about available fields see pcellid1 module

Trait Implementations

impl Readable for PCELLID1[src]

read() method returns pcellid1::R reader structure

impl ResetValue for PCELLID1[src]

Register PCELLID1 reset()'s with value 0

type Type = u32

Register size

impl Writable for PCELLID1[src]

write(|w| ..) method takes pcellid1::W writer structure