Type Definition cc3220sf::system_control::sysctl::W

type W = W<u32, SYSCTL>;

Writer for register SYSCTL

Implementations

impl W

pub fn dto(&mut self) -> DTO_W

Bits 16:19 - Data timeout counter value and busy timeout. This value determines the interval by which DAT lines timeouts are detected. The host driver needs to set this bitfield based on - the maximum read access time (NAC) (Refer to the SD Specification Part1 Physical Layer) - the data read access time values (TAAC and NSAC) in the card specific data register (CSD) of the card - the timeout clock base frequency (MMCHS_CAPA[TCF]). If the card does not respond within the specified number of cycles a data timeout error occurs (MMCHS_STA[DTO]). The MMCHS_SYSCTL[DTO] register is also used to check busy duration to generate busy timeout for commands with busy response or for busy programming during a write command. Timeout on CRC status is generated if no CRC token is present after a block write. 0x0 TCF x 2^13 0x1 TCF x 2^14 0xE TCF x 2^27 0xF Reserved

pub fn clkd(&mut self) -> CLKD_W

Bits 6:15 - Clock frequency select These bits define the ratio between a reference clock frequency (system dependant) and the output clock frequency on the CLK pin of either the memory card (MMC SD or SDIO). 0x000 Clock Ref bypass 0x001 Clock Ref bypass 0x002 Clock Ref / 2 0x003 Clock Ref / 3 0x3FF Clock Ref / 1023