Type Definition cc3220sf::gprcm::nwp_sram_dslp_cfg::W

type W = W<u32, NWP_SRAM_DSLP_CFG>;

Writer for register NWP_SRAM_DSLP_CFG

Implementations

impl W

pub fn nwp_sram_dslp_cfg(&mut self) -> NWP_SRAM_DSLP_CFG_W

Bits 0:19 - Configuration of NWP Memories during DSLP : 0 - SRAMs are OFF ; 1 - SRAMs are Retained. NWP SRAM Cluster information : [2]

• 3rd column in MEMSS (Applicable only when owned by NWP) ; [3]
• 4th column in MEMSS (Applicable only when owned by NWP) ; [4]
• 5th column in MEMSS (Applicable only when owned by NWP) ; [5]
• 6th column in MEMSS (Applicable only when owned by NWP) ; [6]
• 7th column in MEMSS (Applicable only when owned by NWP) ; [7]
• 8th column in MEMSS (Applicable only when owned by NWP) ; [8]
• 9th column in MEMSS (Applicable only when owned by NWP) ; [9]
• 10th column in MEMSS (Applicable only when owned by NWP) ; [10]
• 11th column in MEMSS (Applicable only when owned by NWP) ; [11]
• 12th column in MEMSS (Applicable only when owned by NWP) ; [12]
• 13th column in MEMSS (Applicable only when owned by NWP) ; [13]
• 14th column in MEMSS (Applicable only when owned by NWP) ; [14]
• 15th column in MEMSS (Applicable only when owned by NWP) ; [19:18]
• Reserved.