[][src]Type Definition cc3220sf::gpioa3::PCELLID0

type PCELLID0 = Reg<u32, _PCELLID0>;

0x4000 5FF0 0x4000 6FF0 0x4000 7FF0 0x4002 4FF0 GPIO PrimeCell Identification 0 (GPIOPCellID0)@@ offset 0xFF0 The GPIOPCellID0@@ GPIOPCellID1@@ GPIOPCellID2@@ and GPIOPCellID3 registers are four 8-bit wide registers@@ that can conceptually be treated as one 32-bit register. The register is used as a standard cross-peripheral identification system.

This register you can read, reset, write, write_with_zero, modify. See API.

For information about available fields see pcellid0 module

Trait Implementations

impl Readable for PCELLID0[src]

read() method returns pcellid0::R reader structure

impl ResetValue for PCELLID0[src]

Register PCELLID0 reset()'s with value 0

type Type = u32

Register size

impl Writable for PCELLID0[src]

write(|w| ..) method takes pcellid0::W writer structure