Type Definition cc3220sf::apps_config::gpt_trig_sel::W

type W = W<u32, GPT_TRIG_SEL>;

Writer for register GPT_TRIG_SEL

Implementations

impl W

pub fn gpt_trig_sel(&mut self) -> GPT_TRIG_SEL_W

Bits 0:7 - This bit is implemented for GPT trigger mode select. GPT IP support 2 modes: RTC mode and external trigger. When this bit is set to logic '1': enable external trigger mode for APPS GPT CP0 and CP1 pin. bit 0: when set '1' enable external GPT trigger 0 on GPIO0 CP0 pin else RTC mode is selected. bit 1: when set '1' enable external GPT trigger 1 on GPIO0 CP1 pin else RTC mode is selected. bit 2: when set '1' enable external GPT trigger 2 on GPIO1 CP0 pin else RTC mode is selected. bit 3: when set '1' enable external GPT trigger 3 on GPIO1 CP1 pin else RTC mode is selected. bit 4: when set '1' enable external GPT trigger 4 on GPIO2 CP0 pin else RTC mode is selected. bit 5: when set '1' enable external GPT trigger 5 on GPIO2 CP1 pin else RTC mode is selected. bit 6: when set '1' enable external GPT trigger 6 on GPIO3 CP0 pin else RTC mode is selected. bit 7: when set '1' enable external GPT trigger 7 on GPIO3 CP1 pin else RTC mode is selected.