Module cc3220sf::aes::c_length_0

Crypto data length registers (LSW and MSW) store the cryptographic data length in bytes for all modes. Once processing with this context is started@@ this length decrements to zero. Data lengths up to (2^61 1) bytes are allowed. For GCM@@ any value up to 2^36 - 32 bytes can be used. This is because a 32-bit counter mode is used; the maximum number of 128-bit blocks is 2^32 2@@ resulting in a maximum number of bytes of 2^36 - 32. A write to this register triggers the engine to start using this context. This is valid for all modes except GCM and CCM. Note that for the combined modes@@ this length does not include the authentication only data; the authentication length is specified in the AES_AUTH_LENGTH register below. All modes must have a length > 0. For the combined modes@@ it is allowed to have one of the lengths equal to zero. For the basic encryption modes (ECB/CBC/CTR/ICM/CFB128) it is allowed to program zero to the length field; in that case the length is assumed infinite. All data must be byte (8-bit) aligned; bit aligned data streams are not supported by the AES Engine. For a Host read operation@@ these registers return all-zeroes.

Type Definitions

R	Reader of register C_LENGTH_0
W	Writer for register C_LENGTH_0