Struct cc2650::crypto::RegisterBlock

#[repr(C)]
pub struct RegisterBlock {
    pub dmach0ctl: DMACH0CTL,
    pub dmach0extaddr: DMACH0EXTADDR,
    pub dmach0len: DMACH0LEN,
    pub dmastat: DMASTAT,
    pub dmaswreset: DMASWRESET,
    pub dmach1ctl: DMACH1CTL,
    pub dmach1extaddr: DMACH1EXTADDR,
    pub dmach1len: DMACH1LEN,
    pub dmabuscfg: DMABUSCFG,
    pub dmaporterr: DMAPORTERR,
    pub dmahwver: DMAHWVER,
    pub keywritearea: KEYWRITEAREA,
    pub keywrittenarea: KEYWRITTENAREA,
    pub keysize: KEYSIZE,
    pub keyreadarea: KEYREADAREA,
    pub aeskey2: AESKEY2,
    pub aeskey3: AESKEY3,
    pub aesiv: AESIV,
    pub aesctl: AESCTL,
    pub aesdatalen0: AESDATALEN0,
    pub aesdatalen1: AESDATALEN1,
    pub aesauthlen: AESAUTHLEN,
    pub aesdataout0: AESDATAOUT0,
    pub aesdataout1: AESDATAOUT1,
    pub aesdataout2: AESDATAOUT2,
    pub aesdataout3: AESDATAOUT3,
    pub aestagout: AESTAGOUT,
    pub algsel: ALGSEL,
    pub dmaprotctl: DMAPROTCTL,
    pub swreset: SWRESET,
    pub irqtype: IRQTYPE,
    pub irqen: IRQEN,
    pub irqclr: IRQCLR,
    pub irqset: IRQSET,
    pub irqstat: IRQSTAT,
    pub hwver: HWVER,
    // some fields omitted
}

Register block

Fields

dmach0ctl: DMACH0CTL

0x00 - DMA Channel 0 Control

dmach0extaddr: DMACH0EXTADDR

0x04 - DMA Channel 0 External Address

dmach0len: DMACH0LEN

0x0c - DMA Channel 0 Length

dmastat: DMASTAT

0x18 - DMA Controller Status

dmaswreset: DMASWRESET

0x1c - DMA Controller Software Reset

dmach1ctl: DMACH1CTL

0x20 - DMA Channel 1 Control

dmach1extaddr: DMACH1EXTADDR

0x24 - DMA Channel 1 External Address

dmach1len: DMACH1LEN

0x2c - DMA Channel 1 Length

dmabuscfg: DMABUSCFG

0x78 - DMA Controller Master Configuration

dmaporterr: DMAPORTERR

0x7c - DMA Controller Port Error

dmahwver: DMAHWVER

0xfc - DMA Controller Version

keywritearea: KEYWRITEAREA

0x400 - Key Write Area

keywrittenarea: KEYWRITTENAREA

0x404 - Key Written Area Status This register shows which areas of the key store RAM contain valid written keys. When a new key needs to be written to the key store, on a location that is already occupied by a valid key, this key area must be cleared first. This can be done by writing this register before the new key is written to the key store memory. Attempting to write to a key area that already contains a valid key is not allowed and will result in an error.

keysize: KEYSIZE

0x408 - Key Size This register defines the size of the keys that are written with DMA.

keyreadarea: KEYREADAREA

0x40c - Key Read Area

aeskey2: AESKEY2

0x500 - Clear AES_KEY2/GHASH Key

aeskey3: AESKEY3

0x510 - Clear AES_KEY3

aesiv: AESIV

0x540 - AES Initialization Vector

aesctl: AESCTL

0x550 - AES Input/Output Buffer Control

aesdatalen0: AESDATALEN0

0x554 - Crypto Data Length LSW

aesdatalen1: AESDATALEN1

0x558 - Crypto Data Length MSW

aesauthlen: AESAUTHLEN

0x55c - AES Authentication Length

aesdataout0: AESDATAOUT0

0x560 - Data Input/Output

aesdataout1: AESDATAOUT1

0x564 - AES Data Input/Output 3

aesdataout2: AESDATAOUT2

0x568 - AES Data Input/Output 2

aesdataout3: AESDATAOUT3

0x56c - AES Data Input/Output 3

aestagout: AESTAGOUT

0x570 - AES Tag Output

algsel: ALGSEL

0x700 - Master Algorithm Select This register configures the internal destination of the DMA controller.

dmaprotctl: DMAPROTCTL

0x704 - Master Protection Control

swreset: SWRESET

0x740 - Software Reset

irqtype: IRQTYPE

0x780 - Control Interrupt Configuration

irqen: IRQEN

0x784 - Interrupt Enable

irqclr: IRQCLR

0x788 - Interrupt Clear

irqset: IRQSET

0x78c - Interrupt Set

irqstat: IRQSTAT

0x790 - Interrupt Status

hwver: HWVER

0x7fc - CTRL Module Version