[][src]Struct cc2650::cpu_dwt::mask2::R

pub struct R { /* fields omitted */ }

Value read from the register

Methods

impl R[src]

pub fn bits(&self) -> u32[src]

Value of the register as raw bits

pub fn reserved4(&self) -> RESERVED4R[src]

Bits 4:31 - Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn mask(&self) -> MASKR[src]

Bits 0:3 - Mask on data address when matching against COMP2. This is the size of the ignore mask. That is, DWT matching is performed as:(ADDR ANDed with (0xFFFF left bit-shifted by MASK)) == COMP2. However, the actual comparison is slightly more complex to enable matching an address wherever it appears on a bus. So, if COMP2 is 3, this matches a word access of 0, because 3 would be within the word.

Auto Trait Implementations

impl Send for R

impl Sync for R

Blanket Implementations

impl<T> From for T[src]

impl<T, U> TryFrom for T where
    U: Into<T>, 
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type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto for T where
    U: TryFrom<T>, 
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type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.

impl<T, U> Into for T where
    U: From<T>, 
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impl<T> Borrow for T where
    T: ?Sized
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impl<T> BorrowMut for T where
    T: ?Sized
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impl<T> Any for T where
    T: 'static + ?Sized
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