Struct cc2650::aux_ddi0_osc::ctl0::W

pub struct W { /* fields omitted */ }

Value to write to the register

Methods

impl W

pub fn reset_value() -> W

Reset value of the register

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register

pub fn xtal_is_24m(&mut self) -> _XTAL_IS_24MW

Bit 31 - Set based on the accurate high frequency XTAL.

pub fn reserved30(&mut self) -> _RESERVED30W

Bit 30 - Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn bypass_xosc_lf_clk_qual(&mut self) -> _BYPASS_XOSC_LF_CLK_QUALW

Bit 29 - Internal. Only to be used through TI provided API.

pub fn bypass_rcosc_lf_clk_qual(&mut self) -> _BYPASS_RCOSC_LF_CLK_QUALW

Bit 28 - Internal. Only to be used through TI provided API.

pub fn doubler_start_duration(&mut self) -> _DOUBLER_START_DURATIONW

Bits 26:27 - Internal. Only to be used through TI provided API.

pub fn doubler_reset_duration(&mut self) -> _DOUBLER_RESET_DURATIONW

Bit 25 - Internal. Only to be used through TI provided API.

pub fn reserved23(&mut self) -> _RESERVED23W

Bits 23:24 - Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn force_kickstart_en(&mut self) -> _FORCE_KICKSTART_ENW

Bit 22 - Internal. Only to be used through TI provided API.

pub fn reserved17(&mut self) -> _RESERVED17W

Bits 17:21 - Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn allow_sclk_hf_switching(&mut self) -> _ALLOW_SCLK_HF_SWITCHINGW

Bit 16 - 0: Default - Switching of HF clock source is disabled . 1: Allows switching of sclk_hf source. Provided to prevent switching of the SCLK_HF source when running from flash (a long period during switching could corrupt flash). When sclk_hf switching is disabled, a new source can be started when SCLK_HF_SRC_SEL is changed, but the switch will not occur until this bit is set. This bit should be set to enable clock switching after STAT0.PENDINGSCLKHFSWITCHING indicates the new HF clock is ready. When switching completes (also indicated by STAT0.PENDINGSCLKHFSWITCHING) sclk_hf switching should be disabled to prevent flash corruption. Switching should not be enabled when running from flash.

pub fn reserved15(&mut self) -> _RESERVED15W

Bit 15 - Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn hposc_mode_en(&mut self) -> _HPOSC_MODE_ENW

Bit 14 - Internal. Only to be used through TI provided API.

pub fn reserved13(&mut self) -> _RESERVED13W

Bit 13 - Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn rcosc_lf_trimmed(&mut self) -> _RCOSC_LF_TRIMMEDW

Bit 12 - Internal. Only to be used through TI provided API.

pub fn xosc_hf_power_mode(&mut self) -> _XOSC_HF_POWER_MODEW

Bit 11 - Internal. Only to be used through TI provided API.

pub fn xosc_lf_dig_bypass(&mut self) -> _XOSC_LF_DIG_BYPASSW

Bit 10 - Bypass XOSC_LF and use the digital input clock from AON for the xosc_lf clock. 0: Use 32kHz XOSC as xosc_lf clock source 1: Use digital input (from AON) as xosc_lf clock source. This bit will only have effect when SCLK_LF_SRC_SEL is selecting the xosc_lf as the sclk_lf source. The muxing performed by this bit is not glitch free. The following procedure must be followed when changing this field to avoid glitches on sclk_lf. 1) Set SCLK_LF_SRC_SEL to select any source other than the xosc_lf clock source. 2) Set or clear this bit to bypass or not bypass the xosc_lf. 3) Set SCLK_LF_SRC_SEL to use xosc_lf. It is recommended that either the rcosc_hf or xosc_hf (whichever is currently active) be selected as the source in step 1 above. This provides a faster clock change.

pub fn clk_loss_en(&mut self) -> _CLK_LOSS_ENW

Bit 9 - Enable clock loss detection and hence the indicators to system controller. Checks both SCLK_HF and SCLK_LF clock loss indicators. 0: Disable 1: Enable Clock loss detection must be disabled when changing the sclk_lf source. STAT0.SCLK_LF_SRC can be polled to determine when a change to a new sclk_lf source has completed.

pub fn aclk_tdc_src_sel(&mut self) -> _ACLK_TDC_SRC_SELW

Bits 7:8 - Source select for aclk_tdc. 00: RCOSC_HF (48MHz) 01: RCOSC_HF (24MHz) 10: XOSC_HF (24MHz) 11: Not used

pub fn aclk_ref_src_sel(&mut self) -> _ACLK_REF_SRC_SELW

Bits 5:6 - Source select for aclk_ref 00: RCOSC_HF derived (31.25kHz) 01: XOSC_HF derived (31.25kHz) 10: RCOSC_LF (32kHz) 11: XOSC_LF (32.768kHz)

pub fn spare4(&mut self) -> _SPARE4W

Bit 4 - Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn sclk_lf_src_sel(&mut self) -> _SCLK_LF_SRC_SELW

Bits 2:3 - Source select for sclk_lf

pub fn sclk_mf_src_sel(&mut self) -> _SCLK_MF_SRC_SELW

Bit 1 - Internal. Only to be used through TI provided API.

pub fn sclk_hf_src_sel(&mut self) -> _SCLK_HF_SRC_SELW

Bit 0 - Source select for sclk_hf. XOSC option is supported for test and debug only and should be used when the XOSC_HF is running.