1#[doc = "Reader of register ICR"]
2pub type R = crate::R<u32, super::ICR>;
3#[doc = "Writer for register ICR"]
4pub type W = crate::W<u32, super::ICR>;
5#[doc = "Register ICR `reset()`'s with value 0"]
6impl crate::ResetValue for super::ICR {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Reader of field `Reserved16`"]
14pub type RESERVED16_R = crate::R<u16, u16>;
15#[doc = "Write proxy for field `Reserved16`"]
16pub struct RESERVED16_W<'a> {
17 w: &'a mut W,
18}
19impl<'a> RESERVED16_W<'a> {
20 #[doc = r"Writes raw bits to the field"]
21 #[inline(always)]
22 pub unsafe fn bits(self, value: u16) -> &'a mut W {
23 self.w.bits = (self.w.bits & !(0xffff << 16)) | (((value as u32) & 0xffff) << 16);
24 self.w
25 }
26}
27#[doc = "Reader of field `LME5IC`"]
28pub type LME5IC_R = crate::R<bool, bool>;
29#[doc = "Write proxy for field `LME5IC`"]
30pub struct LME5IC_W<'a> {
31 w: &'a mut W,
32}
33impl<'a> LME5IC_W<'a> {
34 #[doc = r"Sets the field bit"]
35 #[inline(always)]
36 pub fn set_bit(self) -> &'a mut W {
37 self.bit(true)
38 }
39 #[doc = r"Clears the field bit"]
40 #[inline(always)]
41 pub fn clear_bit(self) -> &'a mut W {
42 self.bit(false)
43 }
44 #[doc = r"Writes raw bits to the field"]
45 #[inline(always)]
46 pub fn bit(self, value: bool) -> &'a mut W {
47 self.w.bits = (self.w.bits & !(0x01 << 15)) | (((value as u32) & 0x01) << 15);
48 self.w
49 }
50}
51#[doc = "Reader of field `LME1IC`"]
52pub type LME1IC_R = crate::R<bool, bool>;
53#[doc = "Write proxy for field `LME1IC`"]
54pub struct LME1IC_W<'a> {
55 w: &'a mut W,
56}
57impl<'a> LME1IC_W<'a> {
58 #[doc = r"Sets the field bit"]
59 #[inline(always)]
60 pub fn set_bit(self) -> &'a mut W {
61 self.bit(true)
62 }
63 #[doc = r"Clears the field bit"]
64 #[inline(always)]
65 pub fn clear_bit(self) -> &'a mut W {
66 self.bit(false)
67 }
68 #[doc = r"Writes raw bits to the field"]
69 #[inline(always)]
70 pub fn bit(self, value: bool) -> &'a mut W {
71 self.w.bits = (self.w.bits & !(0x01 << 14)) | (((value as u32) & 0x01) << 14);
72 self.w
73 }
74}
75#[doc = "Reader of field `LMSBIC`"]
76pub type LMSBIC_R = crate::R<bool, bool>;
77#[doc = "Write proxy for field `LMSBIC`"]
78pub struct LMSBIC_W<'a> {
79 w: &'a mut W,
80}
81impl<'a> LMSBIC_W<'a> {
82 #[doc = r"Sets the field bit"]
83 #[inline(always)]
84 pub fn set_bit(self) -> &'a mut W {
85 self.bit(true)
86 }
87 #[doc = r"Clears the field bit"]
88 #[inline(always)]
89 pub fn clear_bit(self) -> &'a mut W {
90 self.bit(false)
91 }
92 #[doc = r"Writes raw bits to the field"]
93 #[inline(always)]
94 pub fn bit(self, value: bool) -> &'a mut W {
95 self.w.bits = (self.w.bits & !(0x01 << 13)) | (((value as u32) & 0x01) << 13);
96 self.w
97 }
98}
99#[doc = "Reader of field `NINEBITIC`"]
100pub type NINEBITIC_R = crate::R<bool, bool>;
101#[doc = "Write proxy for field `NINEBITIC`"]
102pub struct NINEBITIC_W<'a> {
103 w: &'a mut W,
104}
105impl<'a> NINEBITIC_W<'a> {
106 #[doc = r"Sets the field bit"]
107 #[inline(always)]
108 pub fn set_bit(self) -> &'a mut W {
109 self.bit(true)
110 }
111 #[doc = r"Clears the field bit"]
112 #[inline(always)]
113 pub fn clear_bit(self) -> &'a mut W {
114 self.bit(false)
115 }
116 #[doc = r"Writes raw bits to the field"]
117 #[inline(always)]
118 pub fn bit(self, value: bool) -> &'a mut W {
119 self.w.bits = (self.w.bits & !(0x01 << 12)) | (((value as u32) & 0x01) << 12);
120 self.w
121 }
122}
123#[doc = "Reader of field `Reserved1`"]
124pub type RESERVED1_R = crate::R<bool, bool>;
125#[doc = "Write proxy for field `Reserved1`"]
126pub struct RESERVED1_W<'a> {
127 w: &'a mut W,
128}
129impl<'a> RESERVED1_W<'a> {
130 #[doc = r"Sets the field bit"]
131 #[inline(always)]
132 pub fn set_bit(self) -> &'a mut W {
133 self.bit(true)
134 }
135 #[doc = r"Clears the field bit"]
136 #[inline(always)]
137 pub fn clear_bit(self) -> &'a mut W {
138 self.bit(false)
139 }
140 #[doc = r"Writes raw bits to the field"]
141 #[inline(always)]
142 pub fn bit(self, value: bool) -> &'a mut W {
143 self.w.bits = (self.w.bits & !(0x01 << 11)) | (((value as u32) & 0x01) << 11);
144 self.w
145 }
146}
147#[doc = "Reader of field `OEIC`"]
148pub type OEIC_R = crate::R<bool, bool>;
149#[doc = "Write proxy for field `OEIC`"]
150pub struct OEIC_W<'a> {
151 w: &'a mut W,
152}
153impl<'a> OEIC_W<'a> {
154 #[doc = r"Sets the field bit"]
155 #[inline(always)]
156 pub fn set_bit(self) -> &'a mut W {
157 self.bit(true)
158 }
159 #[doc = r"Clears the field bit"]
160 #[inline(always)]
161 pub fn clear_bit(self) -> &'a mut W {
162 self.bit(false)
163 }
164 #[doc = r"Writes raw bits to the field"]
165 #[inline(always)]
166 pub fn bit(self, value: bool) -> &'a mut W {
167 self.w.bits = (self.w.bits & !(0x01 << 10)) | (((value as u32) & 0x01) << 10);
168 self.w
169 }
170}
171#[doc = "Reader of field `BEIC`"]
172pub type BEIC_R = crate::R<bool, bool>;
173#[doc = "Write proxy for field `BEIC`"]
174pub struct BEIC_W<'a> {
175 w: &'a mut W,
176}
177impl<'a> BEIC_W<'a> {
178 #[doc = r"Sets the field bit"]
179 #[inline(always)]
180 pub fn set_bit(self) -> &'a mut W {
181 self.bit(true)
182 }
183 #[doc = r"Clears the field bit"]
184 #[inline(always)]
185 pub fn clear_bit(self) -> &'a mut W {
186 self.bit(false)
187 }
188 #[doc = r"Writes raw bits to the field"]
189 #[inline(always)]
190 pub fn bit(self, value: bool) -> &'a mut W {
191 self.w.bits = (self.w.bits & !(0x01 << 9)) | (((value as u32) & 0x01) << 9);
192 self.w
193 }
194}
195#[doc = "Reader of field `PEIC`"]
196pub type PEIC_R = crate::R<bool, bool>;
197#[doc = "Write proxy for field `PEIC`"]
198pub struct PEIC_W<'a> {
199 w: &'a mut W,
200}
201impl<'a> PEIC_W<'a> {
202 #[doc = r"Sets the field bit"]
203 #[inline(always)]
204 pub fn set_bit(self) -> &'a mut W {
205 self.bit(true)
206 }
207 #[doc = r"Clears the field bit"]
208 #[inline(always)]
209 pub fn clear_bit(self) -> &'a mut W {
210 self.bit(false)
211 }
212 #[doc = r"Writes raw bits to the field"]
213 #[inline(always)]
214 pub fn bit(self, value: bool) -> &'a mut W {
215 self.w.bits = (self.w.bits & !(0x01 << 8)) | (((value as u32) & 0x01) << 8);
216 self.w
217 }
218}
219#[doc = "Reader of field `FEIC`"]
220pub type FEIC_R = crate::R<bool, bool>;
221#[doc = "Write proxy for field `FEIC`"]
222pub struct FEIC_W<'a> {
223 w: &'a mut W,
224}
225impl<'a> FEIC_W<'a> {
226 #[doc = r"Sets the field bit"]
227 #[inline(always)]
228 pub fn set_bit(self) -> &'a mut W {
229 self.bit(true)
230 }
231 #[doc = r"Clears the field bit"]
232 #[inline(always)]
233 pub fn clear_bit(self) -> &'a mut W {
234 self.bit(false)
235 }
236 #[doc = r"Writes raw bits to the field"]
237 #[inline(always)]
238 pub fn bit(self, value: bool) -> &'a mut W {
239 self.w.bits = (self.w.bits & !(0x01 << 7)) | (((value as u32) & 0x01) << 7);
240 self.w
241 }
242}
243#[doc = "Reader of field `RTIC`"]
244pub type RTIC_R = crate::R<bool, bool>;
245#[doc = "Write proxy for field `RTIC`"]
246pub struct RTIC_W<'a> {
247 w: &'a mut W,
248}
249impl<'a> RTIC_W<'a> {
250 #[doc = r"Sets the field bit"]
251 #[inline(always)]
252 pub fn set_bit(self) -> &'a mut W {
253 self.bit(true)
254 }
255 #[doc = r"Clears the field bit"]
256 #[inline(always)]
257 pub fn clear_bit(self) -> &'a mut W {
258 self.bit(false)
259 }
260 #[doc = r"Writes raw bits to the field"]
261 #[inline(always)]
262 pub fn bit(self, value: bool) -> &'a mut W {
263 self.w.bits = (self.w.bits & !(0x01 << 6)) | (((value as u32) & 0x01) << 6);
264 self.w
265 }
266}
267#[doc = "Reader of field `TXIC`"]
268pub type TXIC_R = crate::R<bool, bool>;
269#[doc = "Write proxy for field `TXIC`"]
270pub struct TXIC_W<'a> {
271 w: &'a mut W,
272}
273impl<'a> TXIC_W<'a> {
274 #[doc = r"Sets the field bit"]
275 #[inline(always)]
276 pub fn set_bit(self) -> &'a mut W {
277 self.bit(true)
278 }
279 #[doc = r"Clears the field bit"]
280 #[inline(always)]
281 pub fn clear_bit(self) -> &'a mut W {
282 self.bit(false)
283 }
284 #[doc = r"Writes raw bits to the field"]
285 #[inline(always)]
286 pub fn bit(self, value: bool) -> &'a mut W {
287 self.w.bits = (self.w.bits & !(0x01 << 5)) | (((value as u32) & 0x01) << 5);
288 self.w
289 }
290}
291#[doc = "Reader of field `RXIC`"]
292pub type RXIC_R = crate::R<bool, bool>;
293#[doc = "Write proxy for field `RXIC`"]
294pub struct RXIC_W<'a> {
295 w: &'a mut W,
296}
297impl<'a> RXIC_W<'a> {
298 #[doc = r"Sets the field bit"]
299 #[inline(always)]
300 pub fn set_bit(self) -> &'a mut W {
301 self.bit(true)
302 }
303 #[doc = r"Clears the field bit"]
304 #[inline(always)]
305 pub fn clear_bit(self) -> &'a mut W {
306 self.bit(false)
307 }
308 #[doc = r"Writes raw bits to the field"]
309 #[inline(always)]
310 pub fn bit(self, value: bool) -> &'a mut W {
311 self.w.bits = (self.w.bits & !(0x01 << 4)) | (((value as u32) & 0x01) << 4);
312 self.w
313 }
314}
315#[doc = "Reader of field `Reserved4`"]
316pub type RESERVED4_R = crate::R<u8, u8>;
317#[doc = "Write proxy for field `Reserved4`"]
318pub struct RESERVED4_W<'a> {
319 w: &'a mut W,
320}
321impl<'a> RESERVED4_W<'a> {
322 #[doc = r"Writes raw bits to the field"]
323 #[inline(always)]
324 pub unsafe fn bits(self, value: u8) -> &'a mut W {
325 self.w.bits = (self.w.bits & !0x0f) | ((value as u32) & 0x0f);
326 self.w
327 }
328}
329impl R {
330 #[doc = "Bits 16:31 - 31:16\\] Software should not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation."]
331 #[inline(always)]
332 pub fn reserved16(&self) -> RESERVED16_R {
333 RESERVED16_R::new(((self.bits >> 16) & 0xffff) as u16)
334 }
335 #[doc = "Bit 15 - 15:15\\] LIN mode edge 5 interrupt clear Writing 1 to this bit clears the LME5RIS bit in the UARTRIS register and the LME5MIS bit in the UARTMIS register."]
336 #[inline(always)]
337 pub fn lme5ic(&self) -> LME5IC_R {
338 LME5IC_R::new(((self.bits >> 15) & 0x01) != 0)
339 }
340 #[doc = "Bit 14 - 14:14\\] LIN mode edge 1 interrupt clear Writing 1 to this bit clears the LME1RIS bit in the UARTRIS register and the LME1MIS bit in the UARTMIS register."]
341 #[inline(always)]
342 pub fn lme1ic(&self) -> LME1IC_R {
343 LME1IC_R::new(((self.bits >> 14) & 0x01) != 0)
344 }
345 #[doc = "Bit 13 - 13:13\\] LIN mode sync break interrupt clear Writing 1 to this bit clears the LMSBRIS bit in the UARTRIS register and the LMSBMIS bit in the UARTMIS register."]
346 #[inline(always)]
347 pub fn lmsbic(&self) -> LMSBIC_R {
348 LMSBIC_R::new(((self.bits >> 13) & 0x01) != 0)
349 }
350 #[doc = "Bit 12 - 12:12\\] 9-bit mode interrupt clear Writing 1 to this bit clears the 9BITRIS bit in the UARTRIS register and the 9BITMIS bit in the UARTMIS register."]
351 #[inline(always)]
352 pub fn ninebitic(&self) -> NINEBITIC_R {
353 NINEBITIC_R::new(((self.bits >> 12) & 0x01) != 0)
354 }
355 #[doc = "Bit 11 - 11:11\\] Software should not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation."]
356 #[inline(always)]
357 pub fn reserved1(&self) -> RESERVED1_R {
358 RESERVED1_R::new(((self.bits >> 11) & 0x01) != 0)
359 }
360 #[doc = "Bit 10 - 10:10\\] Overrun error interrupt clear Writing 1 to this bit clears the OERIS bit in the UARTRIS register and the OEMIS bit in the UARTMIS register."]
361 #[inline(always)]
362 pub fn oeic(&self) -> OEIC_R {
363 OEIC_R::new(((self.bits >> 10) & 0x01) != 0)
364 }
365 #[doc = "Bit 9 - 9:9\\] Break error interrupt clear Writing 1 to this bit clears the BERIS bit in the UARTRIS register and the BEMIS bit in the UARTMIS register."]
366 #[inline(always)]
367 pub fn beic(&self) -> BEIC_R {
368 BEIC_R::new(((self.bits >> 9) & 0x01) != 0)
369 }
370 #[doc = "Bit 8 - 8:8\\] Parity error interrupt clear Writing 1 to this bit clears the PERIS bit in the UARTRIS register and the PEMIS bit in the UARTMIS register."]
371 #[inline(always)]
372 pub fn peic(&self) -> PEIC_R {
373 PEIC_R::new(((self.bits >> 8) & 0x01) != 0)
374 }
375 #[doc = "Bit 7 - 7:7\\] Framing error interrupt clear Writing 1 to this bit clears the FERIS bit in the UARTRIS register and the FEMIS bit in the UARTMIS register."]
376 #[inline(always)]
377 pub fn feic(&self) -> FEIC_R {
378 FEIC_R::new(((self.bits >> 7) & 0x01) != 0)
379 }
380 #[doc = "Bit 6 - 6:6\\] Receive time-out interrupt clear Writing 1 to this bit clears the RTRIS bit in the UARTRIS register and the RTMIS bit in the UARTMIS register."]
381 #[inline(always)]
382 pub fn rtic(&self) -> RTIC_R {
383 RTIC_R::new(((self.bits >> 6) & 0x01) != 0)
384 }
385 #[doc = "Bit 5 - 5:5\\] Transmit interrupt clear Writing 1 to this bit clears the TXRIS bit in the UARTRIS register and the TXMIS bit in the UARTMIS register."]
386 #[inline(always)]
387 pub fn txic(&self) -> TXIC_R {
388 TXIC_R::new(((self.bits >> 5) & 0x01) != 0)
389 }
390 #[doc = "Bit 4 - 4:4\\] Receive interrupt clear Writing 1 to this bit clears the RXRIS bit in the UARTRIS register and the RXMIS bit in the UARTMIS register."]
391 #[inline(always)]
392 pub fn rxic(&self) -> RXIC_R {
393 RXIC_R::new(((self.bits >> 4) & 0x01) != 0)
394 }
395 #[doc = "Bits 0:3 - 3:0\\] Software should not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation."]
396 #[inline(always)]
397 pub fn reserved4(&self) -> RESERVED4_R {
398 RESERVED4_R::new((self.bits & 0x0f) as u8)
399 }
400}
401impl W {
402 #[doc = "Bits 16:31 - 31:16\\] Software should not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation."]
403 #[inline(always)]
404 pub fn reserved16(&mut self) -> RESERVED16_W {
405 RESERVED16_W { w: self }
406 }
407 #[doc = "Bit 15 - 15:15\\] LIN mode edge 5 interrupt clear Writing 1 to this bit clears the LME5RIS bit in the UARTRIS register and the LME5MIS bit in the UARTMIS register."]
408 #[inline(always)]
409 pub fn lme5ic(&mut self) -> LME5IC_W {
410 LME5IC_W { w: self }
411 }
412 #[doc = "Bit 14 - 14:14\\] LIN mode edge 1 interrupt clear Writing 1 to this bit clears the LME1RIS bit in the UARTRIS register and the LME1MIS bit in the UARTMIS register."]
413 #[inline(always)]
414 pub fn lme1ic(&mut self) -> LME1IC_W {
415 LME1IC_W { w: self }
416 }
417 #[doc = "Bit 13 - 13:13\\] LIN mode sync break interrupt clear Writing 1 to this bit clears the LMSBRIS bit in the UARTRIS register and the LMSBMIS bit in the UARTMIS register."]
418 #[inline(always)]
419 pub fn lmsbic(&mut self) -> LMSBIC_W {
420 LMSBIC_W { w: self }
421 }
422 #[doc = "Bit 12 - 12:12\\] 9-bit mode interrupt clear Writing 1 to this bit clears the 9BITRIS bit in the UARTRIS register and the 9BITMIS bit in the UARTMIS register."]
423 #[inline(always)]
424 pub fn ninebitic(&mut self) -> NINEBITIC_W {
425 NINEBITIC_W { w: self }
426 }
427 #[doc = "Bit 11 - 11:11\\] Software should not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation."]
428 #[inline(always)]
429 pub fn reserved1(&mut self) -> RESERVED1_W {
430 RESERVED1_W { w: self }
431 }
432 #[doc = "Bit 10 - 10:10\\] Overrun error interrupt clear Writing 1 to this bit clears the OERIS bit in the UARTRIS register and the OEMIS bit in the UARTMIS register."]
433 #[inline(always)]
434 pub fn oeic(&mut self) -> OEIC_W {
435 OEIC_W { w: self }
436 }
437 #[doc = "Bit 9 - 9:9\\] Break error interrupt clear Writing 1 to this bit clears the BERIS bit in the UARTRIS register and the BEMIS bit in the UARTMIS register."]
438 #[inline(always)]
439 pub fn beic(&mut self) -> BEIC_W {
440 BEIC_W { w: self }
441 }
442 #[doc = "Bit 8 - 8:8\\] Parity error interrupt clear Writing 1 to this bit clears the PERIS bit in the UARTRIS register and the PEMIS bit in the UARTMIS register."]
443 #[inline(always)]
444 pub fn peic(&mut self) -> PEIC_W {
445 PEIC_W { w: self }
446 }
447 #[doc = "Bit 7 - 7:7\\] Framing error interrupt clear Writing 1 to this bit clears the FERIS bit in the UARTRIS register and the FEMIS bit in the UARTMIS register."]
448 #[inline(always)]
449 pub fn feic(&mut self) -> FEIC_W {
450 FEIC_W { w: self }
451 }
452 #[doc = "Bit 6 - 6:6\\] Receive time-out interrupt clear Writing 1 to this bit clears the RTRIS bit in the UARTRIS register and the RTMIS bit in the UARTMIS register."]
453 #[inline(always)]
454 pub fn rtic(&mut self) -> RTIC_W {
455 RTIC_W { w: self }
456 }
457 #[doc = "Bit 5 - 5:5\\] Transmit interrupt clear Writing 1 to this bit clears the TXRIS bit in the UARTRIS register and the TXMIS bit in the UARTMIS register."]
458 #[inline(always)]
459 pub fn txic(&mut self) -> TXIC_W {
460 TXIC_W { w: self }
461 }
462 #[doc = "Bit 4 - 4:4\\] Receive interrupt clear Writing 1 to this bit clears the RXRIS bit in the UARTRIS register and the RXMIS bit in the UARTMIS register."]
463 #[inline(always)]
464 pub fn rxic(&mut self) -> RXIC_W {
465 RXIC_W { w: self }
466 }
467 #[doc = "Bits 0:3 - 3:0\\] Software should not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation."]
468 #[inline(always)]
469 pub fn reserved4(&mut self) -> RESERVED4_W {
470 RESERVED4_W { w: self }
471 }
472}