1#[doc = "Reader of register DR"]
2pub type R = crate::R<u32, super::DR>;
3#[doc = "Writer for register DR"]
4pub type W = crate::W<u32, super::DR>;
5#[doc = "Register DR `reset()`'s with value 0"]
6impl crate::ResetValue for super::DR {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Reader of field `Reserved32`"]
14pub type RESERVED32_R = crate::R<u16, u16>;
15#[doc = "Write proxy for field `Reserved32`"]
16pub struct RESERVED32_W<'a> {
17 w: &'a mut W,
18}
19impl<'a> RESERVED32_W<'a> {
20 #[doc = r"Writes raw bits to the field"]
21 #[inline(always)]
22 pub unsafe fn bits(self, value: u16) -> &'a mut W {
23 self.w.bits = (self.w.bits & !(0xffff << 16)) | (((value as u32) & 0xffff) << 16);
24 self.w
25 }
26}
27#[doc = "Reader of field `DATA`"]
28pub type DATA_R = crate::R<u16, u16>;
29#[doc = "Write proxy for field `DATA`"]
30pub struct DATA_W<'a> {
31 w: &'a mut W,
32}
33impl<'a> DATA_W<'a> {
34 #[doc = r"Writes raw bits to the field"]
35 #[inline(always)]
36 pub unsafe fn bits(self, value: u16) -> &'a mut W {
37 self.w.bits = (self.w.bits & !0xffff) | ((value as u32) & 0xffff);
38 self.w
39 }
40}
41impl R {
42 #[doc = "Bits 16:31 - 31:16\\] Reserved"]
43 #[inline(always)]
44 pub fn reserved32(&self) -> RESERVED32_R {
45 RESERVED32_R::new(((self.bits >> 16) & 0xffff) as u16)
46 }
47 #[doc = "Bits 0:15 - 15:0\\] SSI receive/transmit data register (R/W) Reset value: 0xXXXX A read operation reads the receive FIFO. A write operation writes the transmit FIFO. Software must right-justify data when the SSI is programmed for a data size that is less than 16 bits. Unused bits at the top are ignored by the transmit logic. The receive logic automatically right-justified the data."]
48 #[inline(always)]
49 pub fn data(&self) -> DATA_R {
50 DATA_R::new((self.bits & 0xffff) as u16)
51 }
52}
53impl W {
54 #[doc = "Bits 16:31 - 31:16\\] Reserved"]
55 #[inline(always)]
56 pub fn reserved32(&mut self) -> RESERVED32_W {
57 RESERVED32_W { w: self }
58 }
59 #[doc = "Bits 0:15 - 15:0\\] SSI receive/transmit data register (R/W) Reset value: 0xXXXX A read operation reads the receive FIFO. A write operation writes the transmit FIFO. Software must right-justify data when the SSI is programmed for a data size that is less than 16 bits. Unused bits at the top are ignored by the transmit logic. The receive logic automatically right-justified the data."]
60 #[inline(always)]
61 pub fn data(&mut self) -> DATA_W {
62 DATA_W { w: self }
63 }
64}