cc2538/rfcore_xreg/
mdmtest0.rs1#[doc = "Reader of register MDMTEST0"]
2pub type R = crate::R<u32, super::MDMTEST0>;
3#[doc = "Writer for register MDMTEST0"]
4pub type W = crate::W<u32, super::MDMTEST0>;
5#[doc = "Register MDMTEST0 `reset()`'s with value 0"]
6impl crate::ResetValue for super::MDMTEST0 {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Reader of field `Reserved32`"]
14pub type RESERVED32_R = crate::R<u32, u32>;
15#[doc = "Write proxy for field `Reserved32`"]
16pub struct RESERVED32_W<'a> {
17 w: &'a mut W,
18}
19impl<'a> RESERVED32_W<'a> {
20 #[doc = r"Writes raw bits to the field"]
21 #[inline(always)]
22 pub unsafe fn bits(self, value: u32) -> &'a mut W {
23 self.w.bits = (self.w.bits & !(0x00ff_ffff << 8)) | (((value as u32) & 0x00ff_ffff) << 8);
24 self.w
25 }
26}
27#[doc = "Reader of field `TX_TONE`"]
28pub type TX_TONE_R = crate::R<u8, u8>;
29#[doc = "Write proxy for field `TX_TONE`"]
30pub struct TX_TONE_W<'a> {
31 w: &'a mut W,
32}
33impl<'a> TX_TONE_W<'a> {
34 #[doc = r"Writes raw bits to the field"]
35 #[inline(always)]
36 pub unsafe fn bits(self, value: u8) -> &'a mut W {
37 self.w.bits = (self.w.bits & !(0x0f << 4)) | (((value as u32) & 0x0f) << 4);
38 self.w
39 }
40}
41#[doc = "Reader of field `DC_WIN_SIZE`"]
42pub type DC_WIN_SIZE_R = crate::R<u8, u8>;
43#[doc = "Write proxy for field `DC_WIN_SIZE`"]
44pub struct DC_WIN_SIZE_W<'a> {
45 w: &'a mut W,
46}
47impl<'a> DC_WIN_SIZE_W<'a> {
48 #[doc = r"Writes raw bits to the field"]
49 #[inline(always)]
50 pub unsafe fn bits(self, value: u8) -> &'a mut W {
51 self.w.bits = (self.w.bits & !(0x03 << 2)) | (((value as u32) & 0x03) << 2);
52 self.w
53 }
54}
55#[doc = "Reader of field `DC_BLOCK_MODE`"]
56pub type DC_BLOCK_MODE_R = crate::R<u8, u8>;
57#[doc = "Write proxy for field `DC_BLOCK_MODE`"]
58pub struct DC_BLOCK_MODE_W<'a> {
59 w: &'a mut W,
60}
61impl<'a> DC_BLOCK_MODE_W<'a> {
62 #[doc = r"Writes raw bits to the field"]
63 #[inline(always)]
64 pub unsafe fn bits(self, value: u8) -> &'a mut W {
65 self.w.bits = (self.w.bits & !0x03) | ((value as u32) & 0x03);
66 self.w
67 }
68}
69impl R {
70 #[doc = "Bits 8:31 - 31:8\\] This register is 8 bits in a 32-bit address space."]
71 #[inline(always)]
72 pub fn reserved32(&self) -> RESERVED32_R {
73 RESERVED32_R::new(((self.bits >> 8) & 0x00ff_ffff) as u32)
74 }
75 #[doc = "Bits 4:7 - 7:4\\] Enables the possibility to transmit a baseband tone by picking samples from the sine tables with a controllable phase step between the samples. The step size is controlled by TX_TONE. If MDMTEST1.MOD_IF is 0, the tone is superpositioned on the modulated data, effectively giving modulation with an IF. If MDMTEST1.MOD_IF is 1, only the tone is transmitted. 0000: -6 MHz 0001: -4 MHz 0010: -3 MHz 0011: -2 MHz 0100: -1 MHz 0101: -500 kHz 0110: -4 kHz 0111: 0 1000: 4 kHz 1001: 500 kHz 1010: 1 MHz 1011: 2 MHz 1100: 3 MHz 1101: 4 MHz 1110: 6 MHz Others: Reserved"]
76 #[inline(always)]
77 pub fn tx_tone(&self) -> TX_TONE_R {
78 TX_TONE_R::new(((self.bits >> 4) & 0x0f) as u8)
79 }
80 #[doc = "Bits 2:3 - 3:2\\] Controls the numbers of samples to be accumulated between each dump of the accumulate-and-dump filter used in DC removal 00: 32 samples 01: 64 samples 10: 128 samples 11: 256 samples"]
81 #[inline(always)]
82 pub fn dc_win_size(&self) -> DC_WIN_SIZE_R {
83 DC_WIN_SIZE_R::new(((self.bits >> 2) & 0x03) as u8)
84 }
85 #[doc = "Bits 0:1 - 1:0\\] Selects the mode of operation 00: The input signal to the DC blocker is passed to the output without any attempt to remove DC. 01: Enable DC cancellation. Normal operation 10: Freeze estimates of DC when sync is found. Resume estimating DC when searching for the next frame. 11: Reserved"]
86 #[inline(always)]
87 pub fn dc_block_mode(&self) -> DC_BLOCK_MODE_R {
88 DC_BLOCK_MODE_R::new((self.bits & 0x03) as u8)
89 }
90}
91impl W {
92 #[doc = "Bits 8:31 - 31:8\\] This register is 8 bits in a 32-bit address space."]
93 #[inline(always)]
94 pub fn reserved32(&mut self) -> RESERVED32_W {
95 RESERVED32_W { w: self }
96 }
97 #[doc = "Bits 4:7 - 7:4\\] Enables the possibility to transmit a baseband tone by picking samples from the sine tables with a controllable phase step between the samples. The step size is controlled by TX_TONE. If MDMTEST1.MOD_IF is 0, the tone is superpositioned on the modulated data, effectively giving modulation with an IF. If MDMTEST1.MOD_IF is 1, only the tone is transmitted. 0000: -6 MHz 0001: -4 MHz 0010: -3 MHz 0011: -2 MHz 0100: -1 MHz 0101: -500 kHz 0110: -4 kHz 0111: 0 1000: 4 kHz 1001: 500 kHz 1010: 1 MHz 1011: 2 MHz 1100: 3 MHz 1101: 4 MHz 1110: 6 MHz Others: Reserved"]
98 #[inline(always)]
99 pub fn tx_tone(&mut self) -> TX_TONE_W {
100 TX_TONE_W { w: self }
101 }
102 #[doc = "Bits 2:3 - 3:2\\] Controls the numbers of samples to be accumulated between each dump of the accumulate-and-dump filter used in DC removal 00: 32 samples 01: 64 samples 10: 128 samples 11: 256 samples"]
103 #[inline(always)]
104 pub fn dc_win_size(&mut self) -> DC_WIN_SIZE_W {
105 DC_WIN_SIZE_W { w: self }
106 }
107 #[doc = "Bits 0:1 - 1:0\\] Selects the mode of operation 00: The input signal to the DC blocker is passed to the output without any attempt to remove DC. 01: Enable DC cancellation. Normal operation 10: Freeze estimates of DC when sync is found. Resume estimating DC when searching for the next frame. 11: Reserved"]
108 #[inline(always)]
109 pub fn dc_block_mode(&mut self) -> DC_BLOCK_MODE_W {
110 DC_BLOCK_MODE_W { w: self }
111 }
112}