cc2538/rfcore_xreg/
ccactrl1.rs1#[doc = "Reader of register CCACTRL1"]
2pub type R = crate::R<u32, super::CCACTRL1>;
3#[doc = "Writer for register CCACTRL1"]
4pub type W = crate::W<u32, super::CCACTRL1>;
5#[doc = "Register CCACTRL1 `reset()`'s with value 0"]
6impl crate::ResetValue for super::CCACTRL1 {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Reader of field `Reserved32`"]
14pub type RESERVED32_R = crate::R<u32, u32>;
15#[doc = "Write proxy for field `Reserved32`"]
16pub struct RESERVED32_W<'a> {
17 w: &'a mut W,
18}
19impl<'a> RESERVED32_W<'a> {
20 #[doc = r"Writes raw bits to the field"]
21 #[inline(always)]
22 pub unsafe fn bits(self, value: u32) -> &'a mut W {
23 self.w.bits = (self.w.bits & !(0x00ff_ffff << 8)) | (((value as u32) & 0x00ff_ffff) << 8);
24 self.w
25 }
26}
27#[doc = "Reader of field `Reserved8`"]
28pub type RESERVED8_R = crate::R<u8, u8>;
29#[doc = "Write proxy for field `Reserved8`"]
30pub struct RESERVED8_W<'a> {
31 w: &'a mut W,
32}
33impl<'a> RESERVED8_W<'a> {
34 #[doc = r"Writes raw bits to the field"]
35 #[inline(always)]
36 pub unsafe fn bits(self, value: u8) -> &'a mut W {
37 self.w.bits = (self.w.bits & !(0x07 << 5)) | (((value as u32) & 0x07) << 5);
38 self.w
39 }
40}
41#[doc = "Reader of field `CCA_MODE`"]
42pub type CCA_MODE_R = crate::R<u8, u8>;
43#[doc = "Write proxy for field `CCA_MODE`"]
44pub struct CCA_MODE_W<'a> {
45 w: &'a mut W,
46}
47impl<'a> CCA_MODE_W<'a> {
48 #[doc = r"Writes raw bits to the field"]
49 #[inline(always)]
50 pub unsafe fn bits(self, value: u8) -> &'a mut W {
51 self.w.bits = (self.w.bits & !(0x03 << 3)) | (((value as u32) & 0x03) << 3);
52 self.w
53 }
54}
55#[doc = "Reader of field `CCA_HYST`"]
56pub type CCA_HYST_R = crate::R<u8, u8>;
57#[doc = "Write proxy for field `CCA_HYST`"]
58pub struct CCA_HYST_W<'a> {
59 w: &'a mut W,
60}
61impl<'a> CCA_HYST_W<'a> {
62 #[doc = r"Writes raw bits to the field"]
63 #[inline(always)]
64 pub unsafe fn bits(self, value: u8) -> &'a mut W {
65 self.w.bits = (self.w.bits & !0x07) | ((value as u32) & 0x07);
66 self.w
67 }
68}
69impl R {
70 #[doc = "Bits 8:31 - 31:8\\] This register is 8 bits in a 32-bit address space."]
71 #[inline(always)]
72 pub fn reserved32(&self) -> RESERVED32_R {
73 RESERVED32_R::new(((self.bits >> 8) & 0x00ff_ffff) as u32)
74 }
75 #[doc = "Bits 5:7 - 7:5\\] Reserved. Always read 0."]
76 #[inline(always)]
77 pub fn reserved8(&self) -> RESERVED8_R {
78 RESERVED8_R::new(((self.bits >> 5) & 0x07) as u8)
79 }
80 #[doc = "Bits 3:4 - 4:3\\] 00: CCA always set to 1 01: CCA = 1 when RSSI < CCA_THR - CCA_HYST; CCA = 0 when RSSI >= CCA_THR 10: CCA = 1 when not receiving a frame, else CCA = 0 11: CCA = 1 when RSSI < CCA_THR - CCA_HYST and not receiving a frame; CCA = 0 when RSSI >= CCA_THR or when receiving a frame"]
81 #[inline(always)]
82 pub fn cca_mode(&self) -> CCA_MODE_R {
83 CCA_MODE_R::new(((self.bits >> 3) & 0x03) as u8)
84 }
85 #[doc = "Bits 0:2 - 2:0\\] Sets the level of CCA hysteresis. Unsigned values given in dB"]
86 #[inline(always)]
87 pub fn cca_hyst(&self) -> CCA_HYST_R {
88 CCA_HYST_R::new((self.bits & 0x07) as u8)
89 }
90}
91impl W {
92 #[doc = "Bits 8:31 - 31:8\\] This register is 8 bits in a 32-bit address space."]
93 #[inline(always)]
94 pub fn reserved32(&mut self) -> RESERVED32_W {
95 RESERVED32_W { w: self }
96 }
97 #[doc = "Bits 5:7 - 7:5\\] Reserved. Always read 0."]
98 #[inline(always)]
99 pub fn reserved8(&mut self) -> RESERVED8_W {
100 RESERVED8_W { w: self }
101 }
102 #[doc = "Bits 3:4 - 4:3\\] 00: CCA always set to 1 01: CCA = 1 when RSSI < CCA_THR - CCA_HYST; CCA = 0 when RSSI >= CCA_THR 10: CCA = 1 when not receiving a frame, else CCA = 0 11: CCA = 1 when RSSI < CCA_THR - CCA_HYST and not receiving a frame; CCA = 0 when RSSI >= CCA_THR or when receiving a frame"]
103 #[inline(always)]
104 pub fn cca_mode(&mut self) -> CCA_MODE_W {
105 CCA_MODE_W { w: self }
106 }
107 #[doc = "Bits 0:2 - 2:0\\] Sets the level of CCA hysteresis. Unsigned values given in dB"]
108 #[inline(always)]
109 pub fn cca_hyst(&mut self) -> CCA_HYST_W {
110 CCA_HYST_W { w: self }
111 }
112}