1#[doc = "Reader of register CFG"]
2pub type R = crate::R<u32, super::CFG>;
3#[doc = "Writer for register CFG"]
4pub type W = crate::W<u32, super::CFG>;
5#[doc = "Register CFG `reset()`'s with value 0"]
6impl crate::ResetValue for super::CFG {
7 type Type = u32;
8 #[inline(always)]
9 fn reset_value() -> Self::Type {
10 0
11 }
12}
13#[doc = "Reader of field `GPTMCFG`"]
14pub type GPTMCFG_R = crate::R<u8, u8>;
15#[doc = "Write proxy for field `GPTMCFG`"]
16pub struct GPTMCFG_W<'a> {
17 w: &'a mut W,
18}
19impl<'a> GPTMCFG_W<'a> {
20 #[doc = r"Writes raw bits to the field"]
21 #[inline(always)]
22 pub unsafe fn bits(self, value: u8) -> &'a mut W {
23 self.w.bits = (self.w.bits & !0x07) | ((value as u32) & 0x07);
24 self.w
25 }
26}
27impl R {
28 #[doc = "Bits 0:2 - 2:0\\] GPTM configuration The GPTMCFG values are defined as follows: 0x0: 32-bit timer configuration. 0x1: 32-bit real-time clock 0x2: Reserved 0x3: Reserved 0x4: 16-bit timer configuration. The function is controlled by bits \\[1:0\\] of GPTMTAMR and GPTMTBMR. 0x5-0x7: Reserved"]
29 #[inline(always)]
30 pub fn gptmcfg(&self) -> GPTMCFG_R {
31 GPTMCFG_R::new((self.bits & 0x07) as u8)
32 }
33}
34impl W {
35 #[doc = "Bits 0:2 - 2:0\\] GPTM configuration The GPTMCFG values are defined as follows: 0x0: 32-bit timer configuration. 0x1: 32-bit real-time clock 0x2: Reserved 0x3: Reserved 0x4: 16-bit timer configuration. The function is controlled by bits \\[1:0\\] of GPTMTAMR and GPTMTBMR. 0x5-0x7: Reserved"]
36 #[inline(always)]
37 pub fn gptmcfg(&mut self) -> GPTMCFG_W {
38 GPTMCFG_W { w: self }
39 }
40}