[][src]Type Definition cc2538::aes::dmac_ch0_ctrl::W

type W = W<u32, DMAC_CH0_CTRL>;

Writer for register DMAC_CH0_CTRL

Methods

impl W[src]

pub fn reserved30(&mut self) -> RESERVED30_W[src]

Bits 2:31 - 31:2] Should be written with 0s and ignored on read

pub fn prio(&mut self) -> PRIO_W[src]

Bit 1 - 1:1] Channel priority 0: Low 1: High If both channels have the same priority, access of the channels to the external port is arbitrated using the round robin scheme. If one channel has a high priority and another one low, the channel with the high priority is served first, in case of simultaneous access requests.

pub fn en(&mut self) -> EN_W[src]

Bit 0 - 0:0] Channel enable 0: Disabled 1: Enable Note: Disabling an active channel interrupts the DMA operation. The ongoing block transfer completes, but no new transfers are requested.