[−][src]Module cc2538::sys_ctrl::dcgcrfc
This register defines the module clocks for RF CORE when the CPU is in PM0. This register setting is don't care for PM1-3, because the system clock is powered down in these modes.
Structs
| RESERVED32_W | Write proxy for field |
| RFC0_W | Write proxy for field |
Type Definitions
| R | Reader of register DCGCRFC |
| RESERVED32_R | Reader of field |
| RFC0_R | Reader of field |
| W | Writer for register DCGCRFC |