[][src]Type Definition cc2538::udma::stat::R

type R = R<u32, STAT>;

Reader of register STAT

Methods

impl R[src]

pub fn reserved11(&self) -> RESERVED11_R[src]

Bits 21:31 - 31:21] Software should not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation.

pub fn dmachans(&self) -> DMACHANS_R[src]

Bits 16:20 - 20:16] Available uDMA channels minus 1 This field contains a value equal to the number of uDMA channels the uDMA controller is configured to use, minus one. The value of 0x1F corresponds to 32 uDMA channels.

pub fn reserved8(&self) -> RESERVED8_R[src]

Bits 8:15 - 15:8] Software should not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation.

pub fn state(&self) -> STATE_R[src]

Bits 4:7 - 7:4] Control state machine status This field shows the current status of the control state-machine. Status can be one of the following: 0x0: Idle 0x1: Reading channel controller data 0x2: Reading source end pointer 0x3: Reading destination end pointer 0x4: Reading source data 0x5: Writing destination data 0x6: Waiting for uDMA request to clear 0x7: Writing channel controller data 0x8: Stalled 0x9: Done 0xA-0xF: Undefined

pub fn reserved3(&self) -> RESERVED3_R[src]

Bits 1:3 - 3:1] Software should not rely on the value of a reserved bit. To provide compatibility with future products, the value of a reserved bit should be preserved across a read-modify-write operation.

pub fn masten(&self) -> MASTEN_R[src]

Bit 0 - 0:0] Master enable status 0: The uDMA controller is disabled. 1: The uDMA controller is enabled.