Type Definition cc2538::ssi1::CPSR

type CPSR = Reg<u32, _CPSR>;

The CPSR register specifies the division factor which is used to derive the SSIClk from the system clock. The clock is further divided by a value from 1 to 256, which is 1 + SCR. SCR is programmed in the SSICR0 register. The frequency of the SSIClk is defined by: SSIClk = SysClk / (CPSDVSR x (1 + SCR)) The value programmed into this register must be an even number between 2 and 254. The least-significant bit of the programmed number is hard-coded to zero. If an odd number is written to this register, data read back from this register has the least-significant bit as zero.

This register you can read, reset, write, write_with_zero, modify. See API.

For information about avaliable fields see cpsr module

Trait Implementations

impl Readable for CPSR

read() method returns cpsr::R reader structure

impl Writable for CPSR

write(|w| ..) method takes cpsr::W writer structure

impl ResetValue for CPSR

Register CPSR reset()'s with value 0

type Type = u32

Register size

fn reset_value() -> Self::Type

Reset value of the register