[−][src]Type Definition cc2538::aes::AES_KEY3_0
type AES_KEY3_0 = Reg<u32, _AES_KEY3_0>;
AES_KEY3_0 / AES_KEY2_4 Third Key / Second Key (internal, but clearable) The following registers are not accessible through the host for reading and writing. They are used to store internally calculated key information and intermediate results. However, when the host performs a write to the any of the respective AES_KEY2_n or AES_KEY3_n addresses, respectively the whole 128-bit AES_KEY2_n or AES_KEY3_n register is cleared to 0s. The AES_GHASH_H_IN_n registers (required for GHASH, which is part of GCM) are mapped to the AES_KEY2_n registers. The (intermediate) authentication result for GCM and CCM is stored in the AES_KEY3_n register.
This register you can read, reset, write, write_with_zero, modify. See API.
For information about avaliable fields see aes_key3_0 module
Trait Implementations
impl Readable for AES_KEY3_0[src]
read() method returns aes_key3_0::R reader structure
impl Writable for AES_KEY3_0[src]
write(|w| ..) method takes aes_key3_0::W writer structure
impl ResetValue for AES_KEY3_0[src]
Register AES_KEY3_0 reset()'s with value 0