[][src]Type Definition cc2538::aes::ctrl_options::R

type R = R<u32, CTRL_OPTIONS>;

Reader of register CTRL_OPTIONS

Methods

impl R[src]

pub fn type_(&self) -> TYPE_R[src]

Bits 24:31 - 31:24] This field is 0x01 for the TYPE1 device.

pub fn reserved7(&self) -> RESERVED7_R[src]

Bits 17:23 - 23:17] Bits should be ignored

pub fn ahbinterface(&self) -> AHBINTERFACE_R[src]

Bit 16 - 16:16] AHB interface is available If this bit is 0, the EIP-120t has a TCM interface.

pub fn reserved1(&self) -> RESERVED1_R[src]

Bits 9:15 - 15:9] Bits should be ignored

pub fn sha_256(&self) -> SHA_256_R[src]

Bit 8 - 8:8] The HASH core supports SHA-256.

pub fn aes_ccm(&self) -> AES_CCM_R[src]

Bit 7 - 7:7] AES-CCM is available as a single operation.

pub fn aes_gcm(&self) -> AES_GCM_R[src]

Bit 6 - 6:6] AES-GCM is available as a single operation.

pub fn aes_256(&self) -> AES_256_R[src]

Bit 5 - 5:5] AES core supports 256-bit keys Note: If both AES-128 and AES-256 are set to one, the AES core supports 192-bit keys as well.

pub fn aes_128(&self) -> AES_128_R[src]

Bit 4 - 4:4] AES core supports 128-bit keys.

pub fn reserved2(&self) -> RESERVED2_R[src]

Bit 3 - 3:3] Bit should be ignored

pub fn hash(&self) -> HASH_R[src]

Bit 2 - 2:2] HASH Core is available.

pub fn aes(&self) -> AES_R[src]

Bit 1 - 1:1] AES core is available.

pub fn keystore(&self) -> KEYSTORE_R[src]

Bit 0 - 0:0] KEY STORE is available.