[][src]Type Definition cc2538::aes::ctrl_int_clr::W

type W = W<u32, CTRL_INT_CLR>;

Writer for register CTRL_INT_CLR

Methods

impl W[src]

pub fn dma_bus_err(&mut self) -> DMA_BUS_ERR_W[src]

Bit 31 - 31:31] If 1 is written to this bit, the DMA bus error status is cleared. Writing 0 has no effect.

pub fn key_st_wr_err(&mut self) -> KEY_ST_WR_ERR_W[src]

Bit 30 - 30:30] If 1 is written to this bit, the key store write error status is cleared. Writing 0 has no effect.

pub fn key_st_rd_err(&mut self) -> KEY_ST_RD_ERR_W[src]

Bit 29 - 29:29] If 1 is written to this bit, the key store read error status is cleared. Writing 0 has no effect.

pub fn reserved27(&mut self) -> RESERVED27_W[src]

Bits 2:28 - 28:2] Bits should be written with 0s and ignored on read.

pub fn dma_in_done(&mut self) -> DMA_IN_DONE_W[src]

Bit 1 - 1:1] If 1 is written to this bit, the DMA in done (irq_dma_in_done) interrupt output is cleared. Writing 0 has no effect. Note that clearing an interrupt makes sense only if the interrupt output is programmed as level (refer to CTRL_INT_CFG).

pub fn result_av(&mut self) -> RESULT_AV_W[src]

Bit 0 - 0:0] If 1 is written to this bit, the result available (irq_result_av) interrupt output is cleared. Writing 0 has no effect. Note that clearing an interrupt makes sense only if the interrupt output is programmed as level (refer to CTRL_INT_CFG).