cc2538_pac/ssi0/
dr.rs

1#[doc = "Register `DR` reader"]
2pub type R = crate::R<DrSpec>;
3#[doc = "Register `DR` writer"]
4pub type W = crate::W<DrSpec>;
5#[doc = "Field `DATA` reader - SSI receive/transmit data register (R/W) Reset value: 0xXXXX A read operation reads the receive FIFO. A write operation writes the transmit FIFO. Software must right-justify data when the SSI is programmed for a data size that is less than 16 bits. Unused bits at the top are ignored by the transmit logic. The receive logic automatically right-justified the data."]
6pub type DataR = crate::FieldReader<u16>;
7#[doc = "Field `DATA` writer - SSI receive/transmit data register (R/W) Reset value: 0xXXXX A read operation reads the receive FIFO. A write operation writes the transmit FIFO. Software must right-justify data when the SSI is programmed for a data size that is less than 16 bits. Unused bits at the top are ignored by the transmit logic. The receive logic automatically right-justified the data."]
8pub type DataW<'a, REG> = crate::FieldWriter<'a, REG, 16, u16>;
9impl R {
10    #[doc = "Bits 0:15 - SSI receive/transmit data register (R/W) Reset value: 0xXXXX A read operation reads the receive FIFO. A write operation writes the transmit FIFO. Software must right-justify data when the SSI is programmed for a data size that is less than 16 bits. Unused bits at the top are ignored by the transmit logic. The receive logic automatically right-justified the data."]
11    #[inline(always)]
12    pub fn data(&self) -> DataR {
13        DataR::new((self.bits & 0xffff) as u16)
14    }
15}
16impl W {
17    #[doc = "Bits 0:15 - SSI receive/transmit data register (R/W) Reset value: 0xXXXX A read operation reads the receive FIFO. A write operation writes the transmit FIFO. Software must right-justify data when the SSI is programmed for a data size that is less than 16 bits. Unused bits at the top are ignored by the transmit logic. The receive logic automatically right-justified the data."]
18    #[inline(always)]
19    pub fn data(&mut self) -> DataW<DrSpec> {
20        DataW::new(self, 0)
21    }
22}
23#[doc = "The DR register is 16 bits wide. When the SSIDR register is read, the entry in the receive FIFO that is pointed to by the current FIFO read pointer is accessed. When a data value is removed by the SSI receive logic from the incoming data frame, it is placed into the entry in the receive FIFO pointed to by the current FIFO write pointer. When the DR register is written to, the entry in the transmit FIFO that is pointed to by the write pointer is written to. Data values are removed from the transmit FIFO one value at a time by the transmit logic. Each data value is loaded into the transmit serial shifter, then serially shifted out onto the SSITx pin at the programmed bit rate. When a data size of less than 16 bits is selected, the user must right-justify data written to the transmit FIFO. The transmit logic ignores the unused bits. Received data less than 16 bits is automatically right-justified in the receive buffer. When the SSI is programmed for MICROWIRE frame format, the default size for transmit data is eight bits (the most significant byte is ignored). The receive data size is controlled by the programmer. The transmit FIFO and the receive FIFO are not cleared even when the SSE bit in the SSICR1 register is cleared, allowing the software to fill the transmit FIFO before enabling the SSI.\n\nYou can [`read`](crate::Reg::read) this register and get [`dr::R`](R). You can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`dr::W`](W). You can also [`modify`](crate::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
24pub struct DrSpec;
25impl crate::RegisterSpec for DrSpec {
26    type Ux = u32;
27}
28#[doc = "`read()` method returns [`dr::R`](R) reader structure"]
29impl crate::Readable for DrSpec {}
30#[doc = "`write(|w| ..)` method takes [`dr::W`](W) writer structure"]
31impl crate::Writable for DrSpec {
32    type Safety = crate::Unsafe;
33    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
34    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
35}
36#[doc = "`reset()` method sets DR to value 0"]
37impl crate::Resettable for DrSpec {
38    const RESET_VALUE: u32 = 0;
39}
cc2538_pac/ssi0/dr.rs

cc2538_pac/ssi0/
dr.rs
