cc2538_pac/gpio_c/
ic.rs

1#[doc = "Register `IC` writer"]
2pub type W = crate::W<IcSpec>;
3#[doc = "Field `IC` writer - Bit written as 1: Clears edge detection logic Bit written as 0: Has no effect"]
4pub type IcW<'a, REG> = crate::FieldWriter<'a, REG, 8>;
5impl W {
6    #[doc = "Bits 0:7 - Bit written as 1: Clears edge detection logic Bit written as 0: Has no effect"]
7    #[inline(always)]
8    pub fn ic(&mut self) -> IcW<IcSpec> {
9        IcW::new(self, 0)
10    }
11}
12#[doc = "The IC register is the interrupt clear register. Writing 1 to a bit in this register clears the corresponding interrupt edge detection logic register. Writing 0 has no effect.\n\nYou can [`reset`](crate::Reg::reset), [`write`](crate::Reg::write), [`write_with_zero`](crate::Reg::write_with_zero) this register using [`ic::W`](W). See [API](https://docs.rs/svd2rust/#read--modify--write-api)."]
13pub struct IcSpec;
14impl crate::RegisterSpec for IcSpec {
15    type Ux = u32;
16}
17#[doc = "`write(|w| ..)` method takes [`ic::W`](W) writer structure"]
18impl crate::Writable for IcSpec {
19    type Safety = crate::Unsafe;
20    const ZERO_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
21    const ONE_TO_MODIFY_FIELDS_BITMAP: u32 = 0;
22}
23#[doc = "`reset()` method sets IC to value 0"]
24impl crate::Resettable for IcSpec {
25    const RESET_VALUE: u32 = 0;
26}
cc2538_pac/gpio_c/ic.rs

cc2538_pac/gpio_c/
ic.rs
