cc13x2_cc26x2_pac/aux_aiodio2/
io6psel.rs

1#[doc = r" Value read from the register"]
2pub struct R {
3    bits: u32,
4}
5#[doc = r" Value to write to the register"]
6pub struct W {
7    bits: u32,
8}
9impl super::IO6PSEL {
10    #[doc = r" Modifies the contents of the register"]
11    #[inline]
12    pub fn modify<F>(&self, f: F)
13    where
14        for<'w> F: FnOnce(&R, &'w mut W) -> &'w mut W,
15    {
16        let bits = self.register.get();
17        let r = R { bits: bits };
18        let mut w = W { bits: bits };
19        f(&r, &mut w);
20        self.register.set(w.bits);
21    }
22    #[doc = r" Reads the contents of the register"]
23    #[inline]
24    pub fn read(&self) -> R {
25        R {
26            bits: self.register.get(),
27        }
28    }
29    #[doc = r" Writes to the register"]
30    #[inline]
31    pub fn write<F>(&self, f: F)
32    where
33        F: FnOnce(&mut W) -> &mut W,
34    {
35        let mut w = W::reset_value();
36        f(&mut w);
37        self.register.set(w.bits);
38    }
39    #[doc = r" Writes the reset value to the register"]
40    #[inline]
41    pub fn reset(&self) {
42        self.write(|w| w)
43    }
44}
45#[doc = r" Value of the field"]
46pub struct RESERVED3R {
47    bits: u32,
48}
49impl RESERVED3R {
50    #[doc = r" Value of the field as raw bits"]
51    #[inline]
52    pub fn bits(&self) -> u32 {
53        self.bits
54    }
55}
56#[doc = "Possible values of the field `SRC`"]
57#[derive(Clone, Copy, Debug, PartialEq)]
58pub enum SRCR {
59    #[doc = "Peripheral output mux selects asynchronous version of AUX_EVCTL:EVSTAT3.AUX_TIMER2_PULSE."]
60    AUX_TIMER2_PULSE,
61    #[doc = "Peripheral output mux selects asynchronous version of AUX_EVCTL:EVSTAT3.AUX_TIMER2_EV3."]
62    AUX_TIMER2_EV3,
63    #[doc = "Peripheral output mux selects asynchronous version of AUX_EVCTL:EVSTAT3.AUX_TIMER2_EV2."]
64    AUX_TIMER2_EV2,
65    #[doc = "Peripheral output mux selects asynchronous version of AUX_EVCTL:EVSTAT3.AUX_TIMER2_EV1."]
66    AUX_TIMER2_EV1,
67    #[doc = "Peripheral output mux selects asynchronous version of AUX_EVCTL:EVSTAT3.AUX_TIMER2_EV0."]
68    AUX_TIMER2_EV0,
69    #[doc = "Peripheral output mux selects AUX_SPIM MOSI."]
70    AUX_SPIM_MOSI,
71    #[doc = "Peripheral output mux selects AUX_SPIM SCLK."]
72    AUX_SPIM_SCLK,
73    #[doc = "Peripheral output mux selects event selected by AUX_EVCTL:EVOBSCFG"]
74    AUX_EV_OBS,
75}
76impl SRCR {
77    #[doc = r" Value of the field as raw bits"]
78    #[inline]
79    pub fn bits(&self) -> u8 {
80        match *self {
81            SRCR::AUX_TIMER2_PULSE => 7,
82            SRCR::AUX_TIMER2_EV3 => 6,
83            SRCR::AUX_TIMER2_EV2 => 5,
84            SRCR::AUX_TIMER2_EV1 => 4,
85            SRCR::AUX_TIMER2_EV0 => 3,
86            SRCR::AUX_SPIM_MOSI => 2,
87            SRCR::AUX_SPIM_SCLK => 1,
88            SRCR::AUX_EV_OBS => 0,
89        }
90    }
91    #[allow(missing_docs)]
92    #[doc(hidden)]
93    #[inline]
94    pub fn _from(value: u8) -> SRCR {
95        match value {
96            7 => SRCR::AUX_TIMER2_PULSE,
97            6 => SRCR::AUX_TIMER2_EV3,
98            5 => SRCR::AUX_TIMER2_EV2,
99            4 => SRCR::AUX_TIMER2_EV1,
100            3 => SRCR::AUX_TIMER2_EV0,
101            2 => SRCR::AUX_SPIM_MOSI,
102            1 => SRCR::AUX_SPIM_SCLK,
103            0 => SRCR::AUX_EV_OBS,
104            _ => unreachable!(),
105        }
106    }
107    #[doc = "Checks if the value of the field is `AUX_TIMER2_PULSE`"]
108    #[inline]
109    pub fn is_aux_timer2_pulse(&self) -> bool {
110        *self == SRCR::AUX_TIMER2_PULSE
111    }
112    #[doc = "Checks if the value of the field is `AUX_TIMER2_EV3`"]
113    #[inline]
114    pub fn is_aux_timer2_ev3(&self) -> bool {
115        *self == SRCR::AUX_TIMER2_EV3
116    }
117    #[doc = "Checks if the value of the field is `AUX_TIMER2_EV2`"]
118    #[inline]
119    pub fn is_aux_timer2_ev2(&self) -> bool {
120        *self == SRCR::AUX_TIMER2_EV2
121    }
122    #[doc = "Checks if the value of the field is `AUX_TIMER2_EV1`"]
123    #[inline]
124    pub fn is_aux_timer2_ev1(&self) -> bool {
125        *self == SRCR::AUX_TIMER2_EV1
126    }
127    #[doc = "Checks if the value of the field is `AUX_TIMER2_EV0`"]
128    #[inline]
129    pub fn is_aux_timer2_ev0(&self) -> bool {
130        *self == SRCR::AUX_TIMER2_EV0
131    }
132    #[doc = "Checks if the value of the field is `AUX_SPIM_MOSI`"]
133    #[inline]
134    pub fn is_aux_spim_mosi(&self) -> bool {
135        *self == SRCR::AUX_SPIM_MOSI
136    }
137    #[doc = "Checks if the value of the field is `AUX_SPIM_SCLK`"]
138    #[inline]
139    pub fn is_aux_spim_sclk(&self) -> bool {
140        *self == SRCR::AUX_SPIM_SCLK
141    }
142    #[doc = "Checks if the value of the field is `AUX_EV_OBS`"]
143    #[inline]
144    pub fn is_aux_ev_obs(&self) -> bool {
145        *self == SRCR::AUX_EV_OBS
146    }
147}
148#[doc = r" Proxy"]
149pub struct _RESERVED3W<'a> {
150    w: &'a mut W,
151}
152impl<'a> _RESERVED3W<'a> {
153    #[doc = r" Writes raw bits to the field"]
154    #[inline]
155    pub unsafe fn bits(self, value: u32) -> &'a mut W {
156        const MASK: u32 = 536870911;
157        const OFFSET: u8 = 3;
158        self.w.bits &= !((MASK as u32) << OFFSET);
159        self.w.bits |= ((value & MASK) as u32) << OFFSET;
160        self.w
161    }
162}
163#[doc = "Values that can be written to the field `SRC`"]
164pub enum SRCW {
165    #[doc = "Peripheral output mux selects asynchronous version of AUX_EVCTL:EVSTAT3.AUX_TIMER2_PULSE."]
166    AUX_TIMER2_PULSE,
167    #[doc = "Peripheral output mux selects asynchronous version of AUX_EVCTL:EVSTAT3.AUX_TIMER2_EV3."]
168    AUX_TIMER2_EV3,
169    #[doc = "Peripheral output mux selects asynchronous version of AUX_EVCTL:EVSTAT3.AUX_TIMER2_EV2."]
170    AUX_TIMER2_EV2,
171    #[doc = "Peripheral output mux selects asynchronous version of AUX_EVCTL:EVSTAT3.AUX_TIMER2_EV1."]
172    AUX_TIMER2_EV1,
173    #[doc = "Peripheral output mux selects asynchronous version of AUX_EVCTL:EVSTAT3.AUX_TIMER2_EV0."]
174    AUX_TIMER2_EV0,
175    #[doc = "Peripheral output mux selects AUX_SPIM MOSI."]
176    AUX_SPIM_MOSI,
177    #[doc = "Peripheral output mux selects AUX_SPIM SCLK."]
178    AUX_SPIM_SCLK,
179    #[doc = "Peripheral output mux selects event selected by AUX_EVCTL:EVOBSCFG"]
180    AUX_EV_OBS,
181}
182impl SRCW {
183    #[allow(missing_docs)]
184    #[doc(hidden)]
185    #[inline]
186    pub fn _bits(&self) -> u8 {
187        match *self {
188            SRCW::AUX_TIMER2_PULSE => 7,
189            SRCW::AUX_TIMER2_EV3 => 6,
190            SRCW::AUX_TIMER2_EV2 => 5,
191            SRCW::AUX_TIMER2_EV1 => 4,
192            SRCW::AUX_TIMER2_EV0 => 3,
193            SRCW::AUX_SPIM_MOSI => 2,
194            SRCW::AUX_SPIM_SCLK => 1,
195            SRCW::AUX_EV_OBS => 0,
196        }
197    }
198}
199#[doc = r" Proxy"]
200pub struct _SRCW<'a> {
201    w: &'a mut W,
202}
203impl<'a> _SRCW<'a> {
204    #[doc = r" Writes `variant` to the field"]
205    #[inline]
206    pub fn variant(self, variant: SRCW) -> &'a mut W {
207        {
208            self.bits(variant._bits())
209        }
210    }
211    #[doc = "Peripheral output mux selects asynchronous version of AUX_EVCTL:EVSTAT3.AUX_TIMER2_PULSE."]
212    #[inline]
213    pub fn aux_timer2_pulse(self) -> &'a mut W {
214        self.variant(SRCW::AUX_TIMER2_PULSE)
215    }
216    #[doc = "Peripheral output mux selects asynchronous version of AUX_EVCTL:EVSTAT3.AUX_TIMER2_EV3."]
217    #[inline]
218    pub fn aux_timer2_ev3(self) -> &'a mut W {
219        self.variant(SRCW::AUX_TIMER2_EV3)
220    }
221    #[doc = "Peripheral output mux selects asynchronous version of AUX_EVCTL:EVSTAT3.AUX_TIMER2_EV2."]
222    #[inline]
223    pub fn aux_timer2_ev2(self) -> &'a mut W {
224        self.variant(SRCW::AUX_TIMER2_EV2)
225    }
226    #[doc = "Peripheral output mux selects asynchronous version of AUX_EVCTL:EVSTAT3.AUX_TIMER2_EV1."]
227    #[inline]
228    pub fn aux_timer2_ev1(self) -> &'a mut W {
229        self.variant(SRCW::AUX_TIMER2_EV1)
230    }
231    #[doc = "Peripheral output mux selects asynchronous version of AUX_EVCTL:EVSTAT3.AUX_TIMER2_EV0."]
232    #[inline]
233    pub fn aux_timer2_ev0(self) -> &'a mut W {
234        self.variant(SRCW::AUX_TIMER2_EV0)
235    }
236    #[doc = "Peripheral output mux selects AUX_SPIM MOSI."]
237    #[inline]
238    pub fn aux_spim_mosi(self) -> &'a mut W {
239        self.variant(SRCW::AUX_SPIM_MOSI)
240    }
241    #[doc = "Peripheral output mux selects AUX_SPIM SCLK."]
242    #[inline]
243    pub fn aux_spim_sclk(self) -> &'a mut W {
244        self.variant(SRCW::AUX_SPIM_SCLK)
245    }
246    #[doc = "Peripheral output mux selects event selected by AUX_EVCTL:EVOBSCFG"]
247    #[inline]
248    pub fn aux_ev_obs(self) -> &'a mut W {
249        self.variant(SRCW::AUX_EV_OBS)
250    }
251    #[doc = r" Writes raw bits to the field"]
252    #[inline]
253    pub fn bits(self, value: u8) -> &'a mut W {
254        const MASK: u8 = 7;
255        const OFFSET: u8 = 0;
256        self.w.bits &= !((MASK as u32) << OFFSET);
257        self.w.bits |= ((value & MASK) as u32) << OFFSET;
258        self.w
259    }
260}
261impl R {
262    #[doc = r" Value of the register as raw bits"]
263    #[inline]
264    pub fn bits(&self) -> u32 {
265        self.bits
266    }
267    #[doc = "Bits 3:31 - 31:3\\] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
268    #[inline]
269    pub fn reserved3(&self) -> RESERVED3R {
270        let bits = {
271            const MASK: u32 = 536870911;
272            const OFFSET: u8 = 3;
273            ((self.bits >> OFFSET) & MASK as u32) as u32
274        };
275        RESERVED3R { bits }
276    }
277    #[doc = "Bits 0:2 - 2:0\\] Select a peripheral signal that connects to AUXIO\\[8i+6\\] when IOPOE bit 6 is set."]
278    #[inline]
279    pub fn src(&self) -> SRCR {
280        SRCR::_from({
281            const MASK: u8 = 7;
282            const OFFSET: u8 = 0;
283            ((self.bits >> OFFSET) & MASK as u32) as u8
284        })
285    }
286}
287impl W {
288    #[doc = r" Reset value of the register"]
289    #[inline]
290    pub fn reset_value() -> W {
291        W { bits: 0 }
292    }
293    #[doc = r" Writes raw bits to the register"]
294    #[inline]
295    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
296        self.bits = bits;
297        self
298    }
299    #[doc = "Bits 3:31 - 31:3\\] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior."]
300    #[inline]
301    pub fn reserved3(&mut self) -> _RESERVED3W {
302        _RESERVED3W { w: self }
303    }
304    #[doc = "Bits 0:2 - 2:0\\] Select a peripheral signal that connects to AUXIO\\[8i+6\\] when IOPOE bit 6 is set."]
305    #[inline]
306    pub fn src(&mut self) -> _SRCW {
307        _SRCW { w: self }
308    }
309}
cc13x2_cc26x2_pac/aux_aiodio2/io6psel.rs

cc13x2_cc26x2_pac/aux_aiodio2/
io6psel.rs
