Struct cc13x2_cc26x2_pac::uart1::dmactl::W

pub struct W { /* fields omitted */ }

Value to write to the register

Methods

impl W

pub fn reset_value() -> W

Reset value of the register

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register

pub fn dmaonerr(&mut self) -> _DMAONERRW

Bit 2 - 2:2] DMA on error. If this bit is set to 1, the DMA receive request outputs (for single and burst requests) are disabled when the UART error interrupt is asserted (more specifically if any of the error interrupts RIS.PERIS, RIS.BERIS, RIS.FERIS or RIS.OERIS are asserted).

pub fn txdmae(&mut self) -> _TXDMAEW

Bit 1 - 1:1] Transmit DMA enable. If this bit is set to 1, DMA for the transmit FIFO is enabled.

pub fn rxdmae(&mut self) -> _RXDMAEW

Bit 0 - 0:0] Receive DMA enable. If this bit is set to 1, DMA for the receive FIFO is enabled.