[][src]Struct cc13x2_cc26x2_pac::cpu_scs::DCRSR

pub struct DCRSR { /* fields omitted */ }

Deubg Core Register Selector The purpose of this register is to select the processor register to transfer data to or from. This write-only register generates a handshake to the core to transfer data to or from Debug Core Register Data Register and the selected register. Until this core transaction is complete, DHCSR.S_REGRDY is 0. Note that writes to this register in any size but word are Unpredictable. Note that PSR registers are fully accessible this way, whereas some read as 0 when using MRS instructions. Note that all bits can be written, but some combinations cause a fault when execution is resumed.

Methods

impl DCRSR[src]

pub fn modify<F>(&self, f: F) where
    F: FnOnce(&R, &'w mut W) -> &'w mut W
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Modifies the contents of the register

pub fn read(&self) -> R[src]

Reads the contents of the register

pub fn write<F>(&self, f: F) where
    F: FnOnce(&mut W) -> &mut W
[src]

Writes to the register

pub fn reset(&self)[src]

Writes the reset value to the register

Auto Trait Implementations

impl Send for DCRSR

impl !Sync for DCRSR

Blanket Implementations

impl<T> From for T[src]

impl<T, U> TryFrom for T where
    U: Into<T>, 
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type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto for T where
    U: TryFrom<T>, 
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type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.

impl<T, U> Into for T where
    U: From<T>, 
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impl<T> Borrow for T where
    T: ?Sized
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impl<T> BorrowMut for T where
    T: ?Sized
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impl<T> Any for T where
    T: 'static + ?Sized
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impl<T> Same for T

type Output = T

Should always be Self