Struct cc13x2_cc26x2_pac::cpu_scs::nvic_icpr1::R

pub struct R { /* fields omitted */ }

Value read from the register

Methods

impl R

pub fn bits(&self) -> u32

Value of the register as raw bits

pub fn reserved6(&self) -> RESERVED6R

Bits 6:31 - 31:6] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn clrpend37(&self) -> CLRPEND37R

Bit 5 - 5:5] Writing 0 to this bit has no effect, writing 1 to this bit clears the corresponding pending interrupt 37 (See EVENT:CPUIRQSEL37.EV for details). Reading the bit returns its current state.

pub fn clrpend36(&self) -> CLRPEND36R

Bit 4 - 4:4] Writing 0 to this bit has no effect, writing 1 to this bit clears the corresponding pending interrupt 36 (See EVENT:CPUIRQSEL36.EV for details). Reading the bit returns its current state.

pub fn clrpend35(&self) -> CLRPEND35R

Bit 3 - 3:3] Writing 0 to this bit has no effect, writing 1 to this bit clears the corresponding pending interrupt 35 (See EVENT:CPUIRQSEL35.EV for details). Reading the bit returns its current state.

pub fn clrpend34(&self) -> CLRPEND34R

Bit 2 - 2:2] Writing 0 to this bit has no effect, writing 1 to this bit clears the corresponding pending interrupt 34 (See EVENT:CPUIRQSEL34.EV for details). Reading the bit returns its current state.

pub fn clrpend33(&self) -> CLRPEND33R

Bit 1 - 1:1] Writing 0 to this bit has no effect, writing 1 to this bit clears the corresponding pending interrupt 33 (See EVENT:CPUIRQSEL33.EV for details). Reading the bit returns its current state.

pub fn clrpend32(&self) -> CLRPEND32R

Bit 0 - 0:0] Writing 0 to this bit has no effect, writing 1 to this bit clears the corresponding pending interrupt 32 (See EVENT:CPUIRQSEL32.EV for details). Reading the bit returns its current state.