[−][src]Struct cc13x2_cc26x2_hal::udma0::waitonreq::W
Value to write to the register
Methods
impl W[src]
pub fn reset_value() -> W[src]
Reset value of the register
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self[src]
Writes raw bits to the register
pub fn chnlstatus(&mut self) -> _CHNLSTATUSW[src]
Bits 0:31 - 31:0] Channel wait on request status: Bit [Ch] = 0: Once uDMA receives a single or burst request on channel Ch, this channel may come out of active state even if request is still present. Bit [Ch] = 1: Once uDMA receives a single or burst request on channel Ch, it keeps channel Ch in active state until the requests are deasserted. This handshake is necessary for channels where the requester is in an asynchronous domain or can run at slower clock speed than uDMA
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