[][src]Struct cc13x2_cc26x2_hal::prcm::secdmaclkgr::R

pub struct R { /* fields omitted */ }

Value read from the register

Methods

impl R[src]

pub fn bits(&self) -> u32[src]

Value of the register as raw bits

pub fn reserved25(&self) -> RESERVED25R[src]

Bits 25:31 - 31:25] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn dma_am_clk_en(&self) -> DMA_AM_CLK_ENR[src]

Bit 24 - 24:24] 0: No force 1: Force clock on for all modes (Run, Sleep and Deep Sleep) Overrides DMA_CLK_EN, SECDMACLKGS.DMA_CLK_EN and SECDMACLKGDS.DMA_CLK_EN when enabled. SYSBUS clock will always run when enabled For changes to take effect, CLKLOADCTL.LOAD needs to be written

pub fn reserved20(&self) -> RESERVED20R[src]

Bits 20:23 - 23:20] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn pka_zerioze_reset_n(&self) -> PKA_ZERIOZE_RESET_NR[src]

Bit 19 - 19:19] Zeroization logic hardware reset. 0: pka_zeroize logic inactive. 1: pka_zeroize of memory is enabled. This register must remain active until the memory are completely zeroized which requires 256 periods on systembus clock.

pub fn pka_am_clk_en(&self) -> PKA_AM_CLK_ENR[src]

Bit 18 - 18:18] 0: No force 1: Force clock on for all modes (Run, Sleep and Deep Sleep) Overrides PKA_CLK_EN, SECDMACLKGS.PKA_CLK_EN and SECDMACLKGDS.PKA_CLK_EN when enabled. For changes to take effect, CLKLOADCTL.LOAD needs to be written

pub fn trng_am_clk_en(&self) -> TRNG_AM_CLK_ENR[src]

Bit 17 - 17:17] 0: No force 1: Force clock on for all modes (Run, Sleep and Deep Sleep) Overrides TRNG_CLK_EN, SECDMACLKGS.TRNG_CLK_EN and SECDMACLKGDS.TRNG_CLK_EN when enabled. For changes to take effect, CLKLOADCTL.LOAD needs to be written

pub fn crypto_am_clk_en(&self) -> CRYPTO_AM_CLK_ENR[src]

Bit 16 - 16:16] 0: No force 1: Force clock on for all modes (Run, Sleep and Deep Sleep) Overrides CRYPTO_CLK_EN, SECDMACLKGS.CRYPTO_CLK_EN and SECDMACLKGDS.CRYPTO_CLK_EN when enabled. SYSBUS clock will always run when enabled For changes to take effect, CLKLOADCTL.LOAD needs to be written

pub fn reserved9(&self) -> RESERVED9R[src]

Bits 9:15 - 15:9] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn dma_clk_en(&self) -> DMA_CLK_ENR[src]

Bit 8 - 8:8] 0: Disable clock 1: Enable clock Can be forced on by DMA_AM_CLK_EN For changes to take effect, CLKLOADCTL.LOAD needs to be written

pub fn reserved3(&self) -> RESERVED3R[src]

Bits 3:7 - 7:3] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn pka_clk_en(&self) -> PKA_CLK_ENR[src]

Bit 2 - 2:2] 0: Disable clock 1: Enable clock Can be forced on by PKA_AM_CLK_EN For changes to take effect, CLKLOADCTL.LOAD needs to be written

pub fn trng_clk_en(&self) -> TRNG_CLK_ENR[src]

Bit 1 - 1:1] 0: Disable clock 1: Enable clock Can be forced on by TRNG_AM_CLK_EN For changes to take effect, CLKLOADCTL.LOAD needs to be written

pub fn crypto_clk_en(&self) -> CRYPTO_CLK_ENR[src]

Bit 0 - 0:0] 0: Disable clock 1: Enable clock Can be forced on by CRYPTO_AM_CLK_EN For changes to take effect, CLKLOADCTL.LOAD needs to be written

Auto Trait Implementations

impl Send for R

impl Sync for R

Blanket Implementations

impl<T> From for T[src]

impl<T, U> TryFrom for T where
    U: Into<T>, 
[src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.

impl<T, U> Into for T where
    U: From<T>, 
[src]

impl<T> Borrow for T where
    T: ?Sized
[src]

impl<T> BorrowMut for T where
    T: ?Sized
[src]

impl<T> Any for T where
    T: 'static + ?Sized
[src]

impl<T> Same for T

type Output = T

Should always be Self