[][src]Struct cc13x2_cc26x2_hal::gpt1::ctl::R

pub struct R { /* fields omitted */ }

Value read from the register

Methods

impl R[src]

pub fn bits(&self) -> u32[src]

Value of the register as raw bits

pub fn reserved15(&self) -> RESERVED15R[src]

Bits 15:31 - 31:15] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn tbpwml(&self) -> TBPWMLR[src]

Bit 14 - 14:14] GPT Timer B PWM Output Level 0: Output is unaffected. 1: Output is inverted.

pub fn reserved12(&self) -> RESERVED12R[src]

Bits 12:13 - 13:12] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn tbevent(&self) -> TBEVENTR[src]

Bits 10:11 - 11:10] GPT Timer B Event Mode The values in this register are defined as follows: Value Description 0x0 Positive edge 0x1 Negative edge 0x2 Reserved 0x3 Both edges Note: If PWM output inversion is enabled, edge detection interrupt behavior is reversed. Thus, if a positive-edge interrupt trigger has been set and the PWM inversion generates a postive edge, no event-trigger interrupt asserts. Instead, the interrupt is generated on the negative edge of the PWM signal.

pub fn tbstall(&self) -> TBSTALLR[src]

Bit 9 - 9:9] GPT Timer B Stall Enable

pub fn tben(&self) -> TBENR[src]

Bit 8 - 8:8] GPT Timer B Enable

pub fn reserved7(&self) -> RESERVED7R[src]

Bit 7 - 7:7] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn tapwml(&self) -> TAPWMLR[src]

Bit 6 - 6:6] GPT Timer A PWM Output Level

pub fn reserved4(&self) -> RESERVED4R[src]

Bits 4:5 - 5:4] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn taevent(&self) -> TAEVENTR[src]

Bits 2:3 - 3:2] GPT Timer A Event Mode The values in this register are defined as follows: Value Description 0x0 Positive edge 0x1 Negative edge 0x2 Reserved 0x3 Both edges Note: If PWM output inversion is enabled, edge detection interrupt behavior is reversed. Thus, if a positive-edge interrupt trigger has been set and the PWM inversion generates a postive edge, no event-trigger interrupt asserts. Instead, the interrupt is generated on the negative edge of the PWM signal.

pub fn tastall(&self) -> TASTALLR[src]

Bit 1 - 1:1] GPT Timer A Stall Enable

pub fn taen(&self) -> TAENR[src]

Bit 0 - 0:0] GPT Timer A Enable

Auto Trait Implementations

impl Send for R

impl Sync for R

Blanket Implementations

impl<T> From for T[src]

impl<T, U> TryFrom for T where
    U: Into<T>, 
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type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.

impl<T, U> Into for T where
    U: From<T>, 
[src]

impl<T> Borrow for T where
    T: ?Sized
[src]

impl<T> BorrowMut for T where
    T: ?Sized
[src]

impl<T> Any for T where
    T: 'static + ?Sized
[src]

impl<T> Same for T

type Output = T

Should always be Self