Struct cc13x2_cc26x2_hal::cpu_scs::nvic_iser1::W

pub struct W { /* fields omitted */ }

Value to write to the register

Methods

impl W

pub fn reset_value() -> W

Reset value of the register

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register

pub fn reserved6(&mut self) -> _RESERVED6W

Bits 6:31 - 31:6] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn setena37(&mut self) -> _SETENA37W

Bit 5 - 5:5] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 37 (See EVENT:CPUIRQSEL37.EV for details). Reading the bit returns its current enable state.

pub fn setena36(&mut self) -> _SETENA36W

Bit 4 - 4:4] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 36 (See EVENT:CPUIRQSEL36.EV for details). Reading the bit returns its current enable state.

pub fn setena35(&mut self) -> _SETENA35W

Bit 3 - 3:3] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 35 (See EVENT:CPUIRQSEL35.EV for details). Reading the bit returns its current enable state.

pub fn setena34(&mut self) -> _SETENA34W

Bit 2 - 2:2] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 34 (See EVENT:CPUIRQSEL34.EV for details). Reading the bit returns its current enable state.

pub fn setena33(&mut self) -> _SETENA33W

Bit 1 - 1:1] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 33 (See EVENT:CPUIRQSEL33.EV for details). Reading the bit returns its current enable state.

pub fn setena32(&mut self) -> _SETENA32W

Bit 0 - 0:0] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 32 (See EVENT:CPUIRQSEL32.EV for details). Reading the bit returns its current enable state.