Struct cc13x2_cc26x2_hal::cpu_scs::nvic_iser0::R

pub struct R { /* fields omitted */ }

Value read from the register

Methods

impl R

pub fn bits(&self) -> u32

Value of the register as raw bits

pub fn setena31(&self) -> SETENA31R

Bit 31 - 31:31] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 31 (See EVENT:CPUIRQSEL31.EV for details). Reading the bit returns its current enable state.

pub fn setena30(&self) -> SETENA30R

Bit 30 - 30:30] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 30 (See EVENT:CPUIRQSEL30.EV for details). Reading the bit returns its current enable state.

pub fn setena29(&self) -> SETENA29R

Bit 29 - 29:29] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 29 (See EVENT:CPUIRQSEL29.EV for details). Reading the bit returns its current enable state.

pub fn setena28(&self) -> SETENA28R

Bit 28 - 28:28] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 28 (See EVENT:CPUIRQSEL28.EV for details). Reading the bit returns its current enable state.

pub fn setena27(&self) -> SETENA27R

Bit 27 - 27:27] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 27 (See EVENT:CPUIRQSEL27.EV for details). Reading the bit returns its current enable state.

pub fn setena26(&self) -> SETENA26R

Bit 26 - 26:26] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 26 (See EVENT:CPUIRQSEL26.EV for details). Reading the bit returns its current enable state.

pub fn setena25(&self) -> SETENA25R

Bit 25 - 25:25] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 25 (See EVENT:CPUIRQSEL25.EV for details). Reading the bit returns its current enable state.

pub fn setena24(&self) -> SETENA24R

Bit 24 - 24:24] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 24 (See EVENT:CPUIRQSEL24.EV for details). Reading the bit returns its current enable state.

pub fn setena23(&self) -> SETENA23R

Bit 23 - 23:23] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 23 (See EVENT:CPUIRQSEL23.EV for details). Reading the bit returns its current enable state.

pub fn setena22(&self) -> SETENA22R

Bit 22 - 22:22] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 22 (See EVENT:CPUIRQSEL22.EV for details). Reading the bit returns its current enable state.

pub fn setena21(&self) -> SETENA21R

Bit 21 - 21:21] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 21 (See EVENT:CPUIRQSEL21.EV for details). Reading the bit returns its current enable state.

pub fn setena20(&self) -> SETENA20R

Bit 20 - 20:20] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 20 (See EVENT:CPUIRQSEL20.EV for details). Reading the bit returns its current enable state.

pub fn setena19(&self) -> SETENA19R

Bit 19 - 19:19] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 19 (See EVENT:CPUIRQSEL19.EV for details). Reading the bit returns its current enable state.

pub fn setena18(&self) -> SETENA18R

Bit 18 - 18:18] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 18 (See EVENT:CPUIRQSEL18.EV for details). Reading the bit returns its current enable state.

pub fn setena17(&self) -> SETENA17R

Bit 17 - 17:17] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 17 (See EVENT:CPUIRQSEL17.EV for details). Reading the bit returns its current enable state.

pub fn setena16(&self) -> SETENA16R

Bit 16 - 16:16] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 16 (See EVENT:CPUIRQSEL16.EV for details). Reading the bit returns its current enable state.

pub fn setena15(&self) -> SETENA15R

Bit 15 - 15:15] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 15 (See EVENT:CPUIRQSEL15.EV for details). Reading the bit returns its current enable state.

pub fn setena14(&self) -> SETENA14R

Bit 14 - 14:14] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 14 (See EVENT:CPUIRQSEL14.EV for details). Reading the bit returns its current enable state.

pub fn setena13(&self) -> SETENA13R

Bit 13 - 13:13] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 13 (See EVENT:CPUIRQSEL13.EV for details). Reading the bit returns its current enable state.

pub fn setena12(&self) -> SETENA12R

Bit 12 - 12:12] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 12 (See EVENT:CPUIRQSEL12.EV for details). Reading the bit returns its current enable state.

pub fn setena11(&self) -> SETENA11R

Bit 11 - 11:11] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 11 (See EVENT:CPUIRQSEL11.EV for details). Reading the bit returns its current enable state.

pub fn setena10(&self) -> SETENA10R

Bit 10 - 10:10] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 10 (See EVENT:CPUIRQSEL10.EV for details). Reading the bit returns its current enable state.

pub fn setena9(&self) -> SETENA9R

Bit 9 - 9:9] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 9 (See EVENT:CPUIRQSEL9.EV for details). Reading the bit returns its current enable state.

pub fn setena8(&self) -> SETENA8R

Bit 8 - 8:8] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 8 (See EVENT:CPUIRQSEL8.EV for details). Reading the bit returns its current enable state.

pub fn setena7(&self) -> SETENA7R

Bit 7 - 7:7] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 7 (See EVENT:CPUIRQSEL7.EV for details). Reading the bit returns its current enable state.

pub fn setena6(&self) -> SETENA6R

Bit 6 - 6:6] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 6 (See EVENT:CPUIRQSEL6.EV for details). Reading the bit returns its current enable state.

pub fn setena5(&self) -> SETENA5R

Bit 5 - 5:5] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 5 (See EVENT:CPUIRQSEL5.EV for details). Reading the bit returns its current enable state.

pub fn setena4(&self) -> SETENA4R

Bit 4 - 4:4] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 4 (See EVENT:CPUIRQSEL4.EV for details). Reading the bit returns its current enable state.

pub fn setena3(&self) -> SETENA3R

Bit 3 - 3:3] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 3 (See EVENT:CPUIRQSEL3.EV for details). Reading the bit returns its current enable state.

pub fn setena2(&self) -> SETENA2R

Bit 2 - 2:2] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 2 (See EVENT:CPUIRQSEL2.EV for details). Reading the bit returns its current enable state.

pub fn setena1(&self) -> SETENA1R

Bit 1 - 1:1] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 1 (See EVENT:CPUIRQSEL1.EV for details). Reading the bit returns its current enable state.

pub fn setena0(&self) -> SETENA0R

Bit 0 - 0:0] Writing 0 to this bit has no effect, writing 1 to this bit enables the interrupt number 0 (See EVENT:CPUIRQSEL0.EV for details). Reading the bit returns its current enable state.