[][src]Struct cc13x2_cc26x2_hal::cpu_scs::icsr::W

pub struct W { /* fields omitted */ }

Value to write to the register

Methods

impl W[src]

pub fn reset_value() -> W[src]

Reset value of the register

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self[src]

Writes raw bits to the register

pub fn nmipendset(&mut self) -> _NMIPENDSETW[src]

Bit 31 - 31:31] Set pending NMI bit. Setting this bit pends and activates an NMI. Because NMI is the highest-priority interrupt, it takes effect as soon as it registers. 0: No action 1: Set pending NMI

pub fn reserved29(&mut self) -> _RESERVED29W[src]

Bits 29:30 - 30:29] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn pendsvset(&mut self) -> _PENDSVSETW[src]

Bit 28 - 28:28] Set pending pendSV bit. 0: No action 1: Set pending PendSV

pub fn pendsvclr(&mut self) -> _PENDSVCLRW[src]

Bit 27 - 27:27] Clear pending pendSV bit 0: No action 1: Clear pending pendSV

pub fn pendstset(&mut self) -> _PENDSTSETW[src]

Bit 26 - 26:26] Set a pending SysTick bit. 0: No action 1: Set pending SysTick

pub fn pendstclr(&mut self) -> _PENDSTCLRW[src]

Bit 25 - 25:25] Clear pending SysTick bit 0: No action 1: Clear pending SysTick

pub fn reserved24(&mut self) -> _RESERVED24W[src]

Bit 24 - 24:24] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn isrpreempt(&mut self) -> _ISRPREEMPTW[src]

Bit 23 - 23:23] This field can only be used at debug time. It indicates that a pending interrupt is to be taken in the next running cycle. If DHCSR.C_MASKINTS= 0, the interrupt is serviced. 0: A pending exception is not serviced. 1: A pending exception is serviced on exit from the debug halt state

pub fn isrpending(&mut self) -> _ISRPENDINGW[src]

Bit 22 - 22:22] Interrupt pending flag. Excludes NMI and faults. 0x0: Interrupt not pending 0x1: Interrupt pending

pub fn reserved18(&mut self) -> _RESERVED18W[src]

Bits 18:21 - 21:18] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn vectpending(&mut self) -> _VECTPENDINGW[src]

Bits 12:17 - 17:12] Pending ISR number field. This field contains the interrupt number of the highest priority pending ISR.

pub fn rettobase(&mut self) -> _RETTOBASEW[src]

Bit 11 - 11:11] Indicates whether there are preempted active exceptions: 0: There are preempted active exceptions to execute 1: There are no active exceptions, or the currently-executing exception is the only active exception.

pub fn reserved9(&mut self) -> _RESERVED9W[src]

Bits 9:10 - 10:9] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn vectactive(&mut self) -> _VECTACTIVEW[src]

Bits 0:8 - 8:0] Active ISR number field. Reset clears this field.

Auto Trait Implementations

impl Send for W

impl Sync for W

Blanket Implementations

impl<T> From for T[src]

impl<T, U> TryFrom for T where
    U: Into<T>, 
[src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T, U> TryInto for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.

impl<T, U> Into for T where
    U: From<T>, 
[src]

impl<T> Borrow for T where
    T: ?Sized
[src]

impl<T> BorrowMut for T where
    T: ?Sized
[src]

impl<T> Any for T where
    T: 'static + ?Sized
[src]

impl<T> Same for T

type Output = T

Should always be Self