Struct cc13x2_cc26x2_hal::cpu_scs::icsr::R

pub struct R { /* fields omitted */ }

Value read from the register

Methods

impl R

pub fn bits(&self) -> u32

Value of the register as raw bits

pub fn nmipendset(&self) -> NMIPENDSETR

Bit 31 - 31:31] Set pending NMI bit. Setting this bit pends and activates an NMI. Because NMI is the highest-priority interrupt, it takes effect as soon as it registers. 0: No action 1: Set pending NMI

pub fn reserved29(&self) -> RESERVED29R

Bits 29:30 - 30:29] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn pendsvset(&self) -> PENDSVSETR

Bit 28 - 28:28] Set pending pendSV bit. 0: No action 1: Set pending PendSV

pub fn pendsvclr(&self) -> PENDSVCLRR

Bit 27 - 27:27] Clear pending pendSV bit 0: No action 1: Clear pending pendSV

pub fn pendstset(&self) -> PENDSTSETR

Bit 26 - 26:26] Set a pending SysTick bit. 0: No action 1: Set pending SysTick

pub fn pendstclr(&self) -> PENDSTCLRR

Bit 25 - 25:25] Clear pending SysTick bit 0: No action 1: Clear pending SysTick

pub fn reserved24(&self) -> RESERVED24R

Bit 24 - 24:24] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn isrpreempt(&self) -> ISRPREEMPTR

Bit 23 - 23:23] This field can only be used at debug time. It indicates that a pending interrupt is to be taken in the next running cycle. If DHCSR.C_MASKINTS= 0, the interrupt is serviced. 0: A pending exception is not serviced. 1: A pending exception is serviced on exit from the debug halt state

pub fn isrpending(&self) -> ISRPENDINGR

Bit 22 - 22:22] Interrupt pending flag. Excludes NMI and faults. 0x0: Interrupt not pending 0x1: Interrupt pending

pub fn reserved18(&self) -> RESERVED18R

Bits 18:21 - 21:18] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn vectpending(&self) -> VECTPENDINGR

Bits 12:17 - 17:12] Pending ISR number field. This field contains the interrupt number of the highest priority pending ISR.

pub fn rettobase(&self) -> RETTOBASER

Bit 11 - 11:11] Indicates whether there are preempted active exceptions: 0: There are preempted active exceptions to execute 1: There are no active exceptions, or the currently-executing exception is the only active exception.

pub fn reserved9(&self) -> RESERVED9R

Bits 9:10 - 10:9] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn vectactive(&self) -> VECTACTIVER

Bits 0:8 - 8:0] Active ISR number field. Reset clears this field.