Struct cc13x2_cc26x2_hal::cpu_scs::hfsr::R

pub struct R { /* fields omitted */ }

Value read from the register

Methods

impl R

pub fn bits(&self) -> u32

Value of the register as raw bits

pub fn debugevt(&self) -> DEBUGEVTR

Bit 31 - 31:31] This bit is set if there is a fault related to debug. This is only possible when halting debug is not enabled. For monitor enabled debug, it only happens for BKPT when the current priority is higher than the monitor. When both halting and monitor debug are disabled, it only happens for debug events that are not ignored (minimally, BKPT). The Debug Fault Status Register is updated.

pub fn forced(&self) -> FORCEDR

Bit 30 - 30:30] Hard Fault activated because a Configurable Fault was received and cannot activate because of priority or because the Configurable Fault is disabled. The Hard Fault handler then has to read the other fault status registers to determine cause.

pub fn reserved2(&self) -> RESERVED2R

Bits 2:29 - 29:2] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn vecttbl(&self) -> VECTTBLR

Bit 1 - 1:1] This bit is set if there is a fault because of vector table read on exception processing (Bus Fault). This case is always a Hard Fault. The return PC points to the pre-empted instruction.

pub fn reserved0(&self) -> RESERVED0R

Bit 0 - 0:0] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.