Struct cc13x2_cc26x2_hal::cpu_dwt::lsucnt::R

pub struct R { /* fields omitted */ }

Value read from the register

Methods

impl R

pub fn bits(&self) -> u32

Value of the register as raw bits

pub fn reserved8(&self) -> RESERVED8R

Bits 8:31 - 31:8] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn lsucnt(&self) -> LSUCNTR

Bits 0:7 - 7:0] LSU counter. This counts the total number of cycles that the processor is processing an LSU operation. The initial execution cost of the instruction is not counted. For example, an LDR that takes two cycles to complete increments this counter one cycle. Equivalently, an LDR that stalls for two cycles (i.e. takes four cycles to execute), increments this counter three times. An event is emitted on counter overflow (every 256 cycles). This counter initializes to 0 when it is enabled using CTRL.LSUEVTENA.