Struct cc13x2_cc26x2_hal::aux_evctl::evstat2::R

pub struct R { /* fields omitted */ }

Value read from the register

Methods

impl R

pub fn bits(&self) -> u32

Value of the register as raw bits

pub fn reserved16(&self) -> RESERVED16R

Bits 16:31 - 31:16] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn aux_compb(&self) -> AUX_COMPBR

Bit 15 - 15:15] Comparator B output. Configuration of AUX_SYSIF:EVSYNCRATE.AUX_COMPB_SYNC_RATE sets the synchronization rate for this event.

pub fn aux_compa(&self) -> AUX_COMPAR

Bit 14 - 14:14] Comparator A output. Configuration of AUX_SYSIF:EVSYNCRATE.AUX_COMPA_SYNC_RATE sets the synchronization rate for this event.

pub fn mcu_obsmux1(&self) -> MCU_OBSMUX1R

Bit 13 - 13:13] Observation input 1 from IOC. This event is configured by IOC:OBSAUXOUTPUT.SEL1.

pub fn mcu_obsmux0(&self) -> MCU_OBSMUX0R

Bit 12 - 12:12] Observation input 0 from IOC. This event is configured by IOC:OBSAUXOUTPUT.SEL0 and can be overridden by IOC:OBSAUXOUTPUT.SEL_MISC.

pub fn mcu_ev(&self) -> MCU_EVR

Bit 11 - 11:11] Event from EVENT configured by EVENT:AUXSEL0.

pub fn aclk_ref(&self) -> ACLK_REFR

Bit 10 - 10:10] TDC reference clock. It is configured by DDI_0_OSC:CTL0.ACLK_REF_SRC_SEL and enabled by AUX_SYSIF:TDCREFCLKCTL.REQ.

pub fn vddr_recharge(&self) -> VDDR_RECHARGER

Bit 9 - 9:9] Event is high while the system recharges VDDR.

pub fn mcu_active(&self) -> MCU_ACTIVER

Bit 8 - 8:8] Event is high while MCU domain is active or transitions to active (GLDO or DCDC power supply state).

pub fn pwr_dwn(&self) -> PWR_DWNR

Bit 7 - 7:7] Event is high while system is in powerdown (uLDO power supply).

pub fn sclk_lf(&self) -> SCLK_LFR

Bit 6 - 6:6] SCLK_LF clock

pub fn aon_batmon_temp_upd(&self) -> AON_BATMON_TEMP_UPDR

Bit 5 - 5:5] Event is high for two SCLK_MF clock periods when there is an update of AON_BATMON:TEMP.

pub fn aon_batmon_bat_upd(&self) -> AON_BATMON_BAT_UPDR

Bit 4 - 4:4] Event is high for two SCLK_MF clock periods when there is an update of AON_BATMON:BAT.

pub fn aon_rtc_4khz(&self) -> AON_RTC_4KHZR

Bit 3 - 3:3] AON_RTC:SUBSEC.VALUE bit 19. AON_RTC:CTL.RTC_4KHZ_EN enables this event.

pub fn aon_rtc_ch2_dly(&self) -> AON_RTC_CH2_DLYR

Bit 2 - 2:2] AON_RTC:EVFLAGS.CH2 delayed by AON_RTC:CTL.EV_DELAY configuration.

pub fn aon_rtc_ch2(&self) -> AON_RTC_CH2R

Bit 1 - 1:1] AON_RTC:EVFLAGS.CH2.

pub fn manual_ev(&self) -> MANUAL_EVR

Bit 0 - 0:0] Programmable event. See MANUAL for description.