Struct cc13x2_cc26x2_hal::aux_anaif::dacsmplcfg1::W

pub struct W { /* fields omitted */ }

Value to write to the register

Methods

impl W

pub fn reset_value() -> W

Reset value of the register

pub unsafe fn bits(&mut self, bits: u32) -> &mut Self

Writes raw bits to the register

pub fn reserved15(&mut self) -> _RESERVED15W

Bits 15:31 - 31:15] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn h_per(&mut self) -> _H_PERW

Bit 14 - 14:14] High time. The sample clock period is high for this many base periods. 0: 2 periods 1: 4 periods

pub fn l_per(&mut self) -> _L_PERW

Bits 12:13 - 13:12] Low time. The sample clock period is low for this many base periods. 0: 1 period 1: 2 periods 2: 3 periods 3: 4 periods

pub fn setup_cnt(&mut self) -> _SETUP_CNTW

Bits 8:11 - 11:8] Setup count. Number of active sample clock periods during the setup phase. 0: 1 sample clock period 1: 2 sample clock periods ... 15 : 16 sample clock periods

pub fn hold_interval(&mut self) -> _HOLD_INTERVALW

Bits 0:7 - 7:0] Hold interval. Number of inactive sample clock periods between each active sample clock period during hold phase. The sample clock is low when inactive. The range is 0 to 255.