[−][src]Module cc13x2_cc26x2_hal::cpu_scs::mpu_rasr
MPU Region Attribute and Size This register controls the MPU access permissions. The register is made up of two part registers, each of halfword size. These can be accessed using the halfword size, or they can both be simultaneously accessed using a word operation. The sub-region disable bits are not supported for region sizes of 32 bytes, 64 bytes, and 128 bytes. When these region sizes are used, the subregion disable bits must be programmed as 0.
Structs
| APR | Value of the field |
| BR | Value of the field |
| CR | Value of the field |
| ENABLER | Value of the field |
| R | Value read from the register |
| RESERVED6R | Value of the field |
| RESERVED22R | Value of the field |
| RESERVED27R | Value of the field |
| RESERVED29R | Value of the field |
| SIZER | Value of the field |
| SR | Value of the field |
| SRDR | Value of the field |
| TEXR | Value of the field |
| W | Value to write to the register |
| XNR | Value of the field |
| _APW | Proxy |
| _BW | Proxy |
| _CW | Proxy |
| _ENABLEW | Proxy |
| _RESERVED6W | Proxy |
| _RESERVED22W | Proxy |
| _RESERVED27W | Proxy |
| _RESERVED29W | Proxy |
| _SIZEW | Proxy |
| _SRDW | Proxy |
| _SW | Proxy |
| _TEXW | Proxy |
| _XNW | Proxy |