[−][src]Struct cc13x2_cc26x2_hal::aon_rtc::ctl::W
Value to write to the register
Methods
impl W
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pub fn reset_value() -> W
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Reset value of the register
pub unsafe fn bits(&mut self, bits: u32) -> &mut Self
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Writes raw bits to the register
pub fn reserved19(&mut self) -> _RESERVED19W
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Bits 19:31 - 31:19] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.
pub fn comb_ev_mask(&mut self) -> _COMB_EV_MASKW
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Bits 16:18 - 18:16] Eventmask selecting which delayed events that form the combined event.
pub fn reserved12(&mut self) -> _RESERVED12W
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Bits 12:15 - 15:12] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.
pub fn ev_delay(&mut self) -> _EV_DELAYW
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Bits 8:11 - 11:8] Number of SCLK_LF clock cycles waited before generating delayed events. (Common setting for all RTC cannels) the delayed event is delayed
pub fn reset(&mut self) -> _RESETW
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Bit 7 - 7:7] RTC Counter reset. Writing 1 to this bit will reset the RTC counter. This bit is cleared when reset takes effect
pub fn reserved3(&mut self) -> _RESERVED3W
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Bits 3:6 - 6:3] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.
pub fn rtc_4khz_en(&mut self) -> _RTC_4KHZ_ENW
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Bit 2 - 2:2] RTC_4KHZ is a 4 KHz reference output, tapped from SUBSEC.VALUE bit 19 which is used by AUX timer. 0: RTC_4KHZ signal is forced to 0 1: RTC_4KHZ is enabled ( provied that RTC is enabled EN)
pub fn rtc_upd_en(&mut self) -> _RTC_UPD_ENW
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Bit 1 - 1:1] RTC_UPD is a 16 KHz signal used to sync up the radio timer. The 16 Khz is SCLK_LF divided by 2 0: RTC_UPD signal is forced to 0 1: RTC_UPD signal is toggling @16 kHz
pub fn en(&mut self) -> _ENW
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Bit 0 - 0:0] Enable RTC counter 0: Halted (frozen) 1: Running
Auto Trait Implementations
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