[][src]Struct cc13x2_cc26x2_hal::wdt::mis::R

pub struct R { /* fields omitted */ }

Value read from the register

Methods

impl R[src]

pub fn bits(&self) -> u32[src]

Value of the register as raw bits

pub fn reserved1(&self) -> RESERVED1R[src]

Bits 1:31 - 31:1] Software should not rely on the value of a reserved. Writing any other value than the reset value may result in undefined behavior.

pub fn wdtmis(&self) -> WDTMISR[src]

Bit 0 - 0:0] This register is the masked interrupt status register. The value of this register is the logical AND of the raw interrupt bit and the WDT interrupt enable bit CTL.INTEN. Value Description 0: The WDT has not timed out or is masked. 1: An unmasked WDT time-out event has occurred.

Auto Trait Implementations

impl Send for R

impl Sync for R

Blanket Implementations

impl<T, U> TryFrom for T where
    U: Into<T>, 
[src]

type Error = Infallible

The type returned in the event of a conversion error.

impl<T> From for T[src]

impl<T, U> TryInto for T where
    U: TryFrom<T>, 
[src]

type Error = <U as TryFrom<T>>::Error

The type returned in the event of a conversion error.

impl<T, U> Into for T where
    U: From<T>, 
[src]

impl<T> Borrow for T where
    T: ?Sized
[src]

impl<T> BorrowMut for T where
    T: ?Sized
[src]

impl<T> Any for T where
    T: 'static + ?Sized
[src]

impl<T> Same for T

type Output = T

Should always be Self